Unverified Commit 37d49c24 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'qcom-drivers-for-6.1' of... 

Merge tag 'qcom-drivers-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for 6.1

The icc-bwmon driver is expected to support measuring LLCC/DDR bandwidth
on SDM845 and SC7280.

The LLCC driver is extended to provide per-platform register mappings to
the LLCC EDAC driver. The QMI encoder/decoder is updated to allow the
passed qmi_elem_info to be const.

Support for SDM845 is added to the sleep stats driver. Power-domains for
the SM6375 platform is added to RPMPD and the platform is added to
socinfo, together with the PM6125 pmic id.

A couple of of_node reference issues are corrected in the smem state and
smsm drivers.

The Qualcomm SCM driver binding is converted to YAML.

* tag 'qcom-drivers-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (29 commits)
  soc: qcom: rpmpd: Add SM6375 support
  dt-bindings: power: rpmpd: Add SM6375 power domains
  firmware: qcom: scm: remove unused __qcom_scm_init declaration
  dt-bindings: power: qcom,rpmpd: drop non-working codeaurora.org emails
  soc: qcom: icc-bwmon: force clear counter/irq registers
  soc: qcom: icc-bwmon: add support for sc7280 LLCC BWMON
  dt-bindings: interconnect: qcom,msm8998-bwmon: Add support for sc7280 BWMONs
  soc: qcom: llcc: Pass LLCC version based register offsets to EDAC driver
  soc: qcom: llcc: Rename reg_offset structs to reflect LLCC version
  soc: qcom: qmi: use const for struct qmi_elem_info
  soc: qcom: icc-bwmon: remove redundant ret variable
  dt-bindings: soc: qcom: stats: Document SDM845 compatible
  soc: qcom: stats: Add SDM845 stats config and compatible
  dt-bindings: firmware: document Qualcomm SM6115 SCM
  soc: qcom: Make QCOM_RPMPD depend on OF
  dt-bindings: firmware: convert Qualcomm SCM binding to the yaml
  soc: qcom: socinfo: Add PM6125 ID
  soc: qcom: socinfo: Add an ID for SM6375
  soc: qcom: smem_state: Add refcounting for the 'state->of_node'
  soc: qcom: smsm: Fix refcount leak bugs in qcom_smsm_probe()
  ...

Link: https://lore.kernel.org/r/20220921155753.1316308-1-andersson@kernel.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents b49aae5e df646a17

Documentation/devicetree/bindings/firmware/qcom,scm.txt

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QCOM Secure Channel Manager (SCM)



Qualcomm processors include an interface to communicate to the secure firmware.

This interface allows for clients to request different types of actions.  These

can include CPU power up/down, HDCP requests, loading of firmware, and other

assorted actions.



Required properties:

- compatible: must contain one of the following:

 * "qcom,scm-apq8064"

 * "qcom,scm-apq8084"

 * "qcom,scm-ipq4019"

 * "qcom,scm-ipq806x"

 * "qcom,scm-ipq8074"

 * "qcom,scm-mdm9607"

 * "qcom,scm-msm8226"

 * "qcom,scm-msm8660"

 * "qcom,scm-msm8916"

 * "qcom,scm-msm8953"

 * "qcom,scm-msm8960"

 * "qcom,scm-msm8974"

 * "qcom,scm-msm8976"

 * "qcom,scm-msm8994"

 * "qcom,scm-msm8996"

 * "qcom,scm-msm8998"

 * "qcom,scm-qcs404"

 * "qcom,scm-sc7180"

 * "qcom,scm-sc7280"

 * "qcom,scm-sm6125"

 * "qcom,scm-sdm845"

 * "qcom,scm-sdx55"

 * "qcom,scm-sdx65"

 * "qcom,scm-sm6350"

 * "qcom,scm-sm8150"

 * "qcom,scm-sm8250"

 * "qcom,scm-sm8350"

 * "qcom,scm-sm8450"

 and:

 * "qcom,scm"

- clocks: Specifies clocks needed by the SCM interface, if any:

 * core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660" and

   "qcom,scm-msm8960"

 * core, iface and bus clocks required for "qcom,scm-apq8084",

   "qcom,scm-msm8916", "qcom,scm-msm8953", "qcom,scm-msm8974" and "qcom,scm-msm8976"

- clock-names: Must contain "core" for the core clock, "iface" for the interface

  clock and "bus" for the bus clock per the requirements of the compatible.

- qcom,dload-mode: phandle to the TCSR hardware block and offset of the

		   download mode control register (optional)

- interconnects: Specifies the bandwidth requirements of the SCM interface (optional)



Example for MSM8916:



	firmware {

		scm {

			compatible = "qcom,msm8916", "qcom,scm";

			clocks = <&gcc GCC_CRYPTO_CLK> ,

				 <&gcc GCC_CRYPTO_AXI_CLK>,

				 <&gcc GCC_CRYPTO_AHB_CLK>;

			clock-names = "core", "bus", "iface";

		};

	};

Documentation/devicetree/bindings/firmware/qcom,scm.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/firmware/qcom,scm.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: QCOM Secure Channel Manager (SCM)



description: |

  Qualcomm processors include an interface to communicate to the secure firmware.

  This interface allows for clients to request different types of actions.

  These can include CPU power up/down, HDCP requests, loading of firmware,

  and other assorted actions.



maintainers:

  - Bjorn Andersson <bjorn.andersson@linaro.org>

  - Robert Marko <robimarko@gmail.com>

  - Guru Das Srinagesh <quic_gurus@quicinc.com>



properties:

  compatible:

    items:

      - enum:

          - qcom,scm-apq8064

          - qcom,scm-apq8084

          - qcom,scm-ipq4019

          - qcom,scm-ipq6018

          - qcom,scm-ipq806x

          - qcom,scm-ipq8074

          - qcom,scm-mdm9607

          - qcom,scm-msm8226

          - qcom,scm-msm8660

          - qcom,scm-msm8916

          - qcom,scm-msm8953

          - qcom,scm-msm8960

          - qcom,scm-msm8974

          - qcom,scm-msm8976

          - qcom,scm-msm8994

          - qcom,scm-msm8996

          - qcom,scm-msm8998

          - qcom,scm-sc7180

          - qcom,scm-sc7280

          - qcom,scm-sc8280xp

          - qcom,scm-sdm845

          - qcom,scm-sdx55

          - qcom,scm-sdx65

          - qcom,scm-sm6115

          - qcom,scm-sm6125

          - qcom,scm-sm6350

          - qcom,scm-sm8150

          - qcom,scm-sm8250

          - qcom,scm-sm8350

          - qcom,scm-sm8450

          - qcom,scm-qcs404

      - const: qcom,scm



  clocks:

    minItems: 1

    maxItems: 3



  clock-names:

    minItems: 1

    maxItems: 3



  interconnects:

    maxItems: 1



  interconnect-names:

    maxItems: 1



  '#reset-cells':

    const: 1



  qcom,dload-mode:

    $ref: /schemas/types.yaml#/definitions/phandle-array

    items:

      - items:

          - description: phandle to TCSR hardware block

          - description: offset of the download mode control register

    description: TCSR hardware block



allOf:

  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,scm-apq8064

              - qcom,scm-msm8660

              - qcom,scm-msm8960

    then:

      properties:

        clock-names:

          items:

            - const: core



        clocks:

          maxItems: 1



      required:

        - clocks

        - clock-names



  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,scm-apq8084

              - qcom,scm-mdm9607

              - qcom,scm-msm8916

              - qcom,scm-msm8953

              - qcom,scm-msm8974

              - qcom,scm-msm8976

    then:

      properties:

        clock-names:

          items:

            - const: core

            - const: bus

            - const: iface



        clocks:

          minItems: 3

          maxItems: 3



      required:

        - clocks

        - clock-names



required:

  - compatible



additionalProperties: false



examples:

  - |

    #include <dt-bindings/clock/qcom,gcc-msm8916.h>



    firmware {

        scm {

            compatible = "qcom,scm-msm8916", "qcom,scm";

            clocks = <&gcc GCC_CRYPTO_CLK>,

                     <&gcc GCC_CRYPTO_AXI_CLK>,

                     <&gcc GCC_CRYPTO_AHB_CLK>;

            clock-names = "core", "bus", "iface";

        };

    };

Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml

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@@ -24,9 +24,12 @@ properties: 
    oneOf:

      - items:

          - enum:

              - qcom,sc7280-bwmon

              - qcom,sdm845-bwmon

          - const: qcom,msm8998-bwmon

      - const: qcom,msm8998-bwmon       # BWMON v4

      - const: qcom,sc7280-llcc-bwmon   # BWMON v5

      - const: qcom,sdm845-llcc-bwmon   # BWMON v5



  interconnects:

    maxItems: 1

Documentation/devicetree/bindings/power/qcom,rpmpd.yaml

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@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# 
title: Qualcomm RPM/RPMh Power domains



maintainers:

  - Rajendra Nayak <rnayak@codeaurora.org>

  - Bjorn Andersson <andersson@kernel.org>



description:

  For RPM/RPMh Power domains, we communicate a performance state to RPM/RPMh
@@ -40,6 +40,7 @@ properties: 
      - qcom,sm6115-rpmpd

      - qcom,sm6125-rpmpd

      - qcom,sm6350-rpmhpd

      - qcom,sm6375-rpmpd

      - qcom,sm8150-rpmhpd

      - qcom,sm8250-rpmhpd

      - qcom,sm8350-rpmhpd

Documentation/devicetree/bindings/soc/qcom/qcom-stats.yaml

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@@ -20,6 +20,7 @@ properties: 
  compatible:

    enum:

      - qcom,rpmh-stats

      - qcom,sdm845-rpmh-stats

      - qcom,rpm-stats

      # For older RPM firmware versions with fixed offset for the sleep stats

      - qcom,apq8084-rpm-stats