Unverified Commit 362f786e authored by Takahiro Kuwano's avatar Takahiro Kuwano Committed by Tudor Ambarus
Browse files

mtd: spi-nor: spansion: switch set_octal_dtr method to use vreg_offset 



All the Infineon flashes that currently support octal DTR mode
define the optional SCCR SFDP table, thus all retrieve vreg_offset.
Switch all the available octal DTR Infineon flashes to use the
volatile register offset to set the configuration registers. The goal
is to have a single pair of methods for both single/multi-chip package
devices.

Signed-off-by: default avatarTakahiro Kuwano <Takahiro.Kuwano@infineon.com>
Link: https://lore.kernel.org/r/20230726075257.12985-5-tudor.ambarus@linaro.org


Signed-off-by: default avatarTudor Ambarus <tudor.ambarus@linaro.org>
parent c0aa0512

drivers/mtd/spi-nor/spansion.c

+19 −6
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 


#include <linux/bitfield.h>

#include <linux/device.h>

#include <linux/errno.h>

#include <linux/mtd/spi-nor.h>



#include "core.h"
@@ -37,8 +38,6 @@ 
	(SPINOR_REG_CYPRESS_VREG + SPINOR_REG_CYPRESS_CFR3)

#define SPINOR_REG_CYPRESS_CFR3_PGSZ		BIT(4) /* Page size. */

#define SPINOR_REG_CYPRESS_CFR5			0x6

#define SPINOR_REG_CYPRESS_CFR5V					\

	(SPINOR_REG_CYPRESS_VREG + SPINOR_REG_CYPRESS_CFR5)

#define SPINOR_REG_CYPRESS_CFR5_BIT6		BIT(6)

#define SPINOR_REG_CYPRESS_CFR5_DDR		BIT(1)

#define SPINOR_REG_CYPRESS_CFR5_OPI		BIT(0)
@@ -202,14 +201,18 @@ static int cypress_nor_set_octal_dtr_bits(struct spi_nor *nor, u64 addr) 


static int cypress_nor_octal_dtr_en(struct spi_nor *nor)

{

	const struct spi_nor_flash_parameter *params = nor->params;

	u8 *buf = nor->bouncebuf;

	u64 addr;

	int ret;



	ret = cypress_nor_set_memlat(nor, SPINOR_REG_CYPRESS_CFR2V);

	addr = params->vreg_offset[0] + SPINOR_REG_CYPRESS_CFR2;

	ret = cypress_nor_set_memlat(nor, addr);

	if (ret)

		return ret;



	ret = cypress_nor_set_octal_dtr_bits(nor, SPINOR_REG_CYPRESS_CFR5V);

	addr = params->vreg_offset[0] + SPINOR_REG_CYPRESS_CFR5;

	ret = cypress_nor_set_octal_dtr_bits(nor, addr);

	if (ret)

		return ret;
@@ -247,9 +250,11 @@ static int cypress_nor_set_single_spi_bits(struct spi_nor *nor, u64 addr) 
static int cypress_nor_octal_dtr_dis(struct spi_nor *nor)

{

	u8 *buf = nor->bouncebuf;

	u64 addr;

	int ret;



	ret = cypress_nor_set_single_spi_bits(nor, SPINOR_REG_CYPRESS_CFR5V);

	addr = nor->params->vreg_offset[0] + SPINOR_REG_CYPRESS_CFR5;

	ret = cypress_nor_set_single_spi_bits(nor, addr);

	if (ret)

		return ret;
@@ -714,7 +719,15 @@ static int s28hx_t_post_bfpt_fixup(struct spi_nor *nor, 


static int s28hx_t_late_init(struct spi_nor *nor)

{

	nor->params->set_octal_dtr = cypress_nor_set_octal_dtr;

	struct spi_nor_flash_parameter *params = nor->params;



	if (!params->n_dice || !params->vreg_offset) {

		dev_err(nor->dev, "%s failed. The volatile register offset could not be retrieved from SFDP.\n",

			__func__);

		return -EOPNOTSUPP;

	}



	params->set_octal_dtr = cypress_nor_set_octal_dtr;

	cypress_nor_ecc_init(nor);



	return 0;