Commit 35d099da authored by Paolo Abeni's avatar Paolo Abeni
Browse files

Merge branch 'octeontx2-minor-tc-fixes' 

Subbaraya Sundeep says:

====================
Octeontx2 minor tc fixes

This patch set fixes two problems found in tc code
wrt to ratelimiting and when installing UDP/TCP filters.

Patch 1: CN10K has different register format compared to
CN9xx hence fixes that.
Patch 2: Check flow mask also before installing a src/dst
port filter, otherwise installing for one port installs for other one too.
====================

Link: https://lore.kernel.org/r/1658650874-16459-1-git-send-email-sbhatta@marvell.com


Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parents 58d8bcd4 d351c90c

drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c

+73 −33
Original line number Diff line number Diff line
@@ -28,6 +28,9 @@ 
#define MAX_RATE_EXPONENT		0x0FULL

#define MAX_RATE_MANTISSA		0xFFULL



#define CN10K_MAX_BURST_MANTISSA	0x7FFFULL

#define CN10K_MAX_BURST_SIZE		8453888ULL



/* Bitfields in NIX_TLX_PIR register */

#define TLX_RATE_MANTISSA		GENMASK_ULL(8, 1)

#define TLX_RATE_EXPONENT		GENMASK_ULL(12, 9)
@@ -35,6 +38,9 @@ 
#define TLX_BURST_MANTISSA		GENMASK_ULL(36, 29)

#define TLX_BURST_EXPONENT		GENMASK_ULL(40, 37)



#define CN10K_TLX_BURST_MANTISSA	GENMASK_ULL(43, 29)

#define CN10K_TLX_BURST_EXPONENT	GENMASK_ULL(47, 44)



struct otx2_tc_flow_stats {

	u64 bytes;

	u64 pkts;
@@ -77,33 +83,42 @@ int otx2_tc_alloc_ent_bitmap(struct otx2_nic *nic) 
}

EXPORT_SYMBOL(otx2_tc_alloc_ent_bitmap);



static void otx2_get_egress_burst_cfg(u32 burst, u32 *burst_exp,

				      u32 *burst_mantissa)

static void otx2_get_egress_burst_cfg(struct otx2_nic *nic, u32 burst,

				      u32 *burst_exp, u32 *burst_mantissa)

{

	int max_burst, max_mantissa;

	unsigned int tmp;



	if (is_dev_otx2(nic->pdev)) {

		max_burst = MAX_BURST_SIZE;

		max_mantissa = MAX_BURST_MANTISSA;

	} else {

		max_burst = CN10K_MAX_BURST_SIZE;

		max_mantissa = CN10K_MAX_BURST_MANTISSA;

	}



	/* Burst is calculated as

	 * ((256 + BURST_MANTISSA) << (1 + BURST_EXPONENT)) / 256

	 * Max supported burst size is 130,816 bytes.

	 */

	burst = min_t(u32, burst, MAX_BURST_SIZE);

	burst = min_t(u32, burst, max_burst);

	if (burst) {

		*burst_exp = ilog2(burst) ? ilog2(burst) - 1 : 0;

		tmp = burst - rounddown_pow_of_two(burst);

		if (burst < MAX_BURST_MANTISSA)

		if (burst < max_mantissa)

			*burst_mantissa = tmp * 2;

		else

			*burst_mantissa = tmp / (1ULL << (*burst_exp - 7));

	} else {

		*burst_exp = MAX_BURST_EXPONENT;

		*burst_mantissa = MAX_BURST_MANTISSA;

		*burst_mantissa = max_mantissa;

	}

}



static void otx2_get_egress_rate_cfg(u32 maxrate, u32 *exp,

static void otx2_get_egress_rate_cfg(u64 maxrate, u32 *exp,

				     u32 *mantissa, u32 *div_exp)

{

	unsigned int tmp;

	u64 tmp;



	/* Rate calculation by hardware

	 *
@@ -132,21 +147,44 @@ static void otx2_get_egress_rate_cfg(u32 maxrate, u32 *exp, 
	}

}



static int otx2_set_matchall_egress_rate(struct otx2_nic *nic, u32 burst, u32 maxrate)

static u64 otx2_get_txschq_rate_regval(struct otx2_nic *nic,

				       u64 maxrate, u32 burst)

{

	struct otx2_hw *hw = &nic->hw;

	struct nix_txschq_config *req;

	u32 burst_exp, burst_mantissa;

	u32 exp, mantissa, div_exp;

	u64 regval = 0;



	/* Get exponent and mantissa values from the desired rate */

	otx2_get_egress_burst_cfg(nic, burst, &burst_exp, &burst_mantissa);

	otx2_get_egress_rate_cfg(maxrate, &exp, &mantissa, &div_exp);



	if (is_dev_otx2(nic->pdev)) {

		regval = FIELD_PREP(TLX_BURST_EXPONENT, (u64)burst_exp) |

				FIELD_PREP(TLX_BURST_MANTISSA, (u64)burst_mantissa) |

				FIELD_PREP(TLX_RATE_DIVIDER_EXPONENT, div_exp) |

				FIELD_PREP(TLX_RATE_EXPONENT, exp) |

				FIELD_PREP(TLX_RATE_MANTISSA, mantissa) | BIT_ULL(0);

	} else {

		regval = FIELD_PREP(CN10K_TLX_BURST_EXPONENT, (u64)burst_exp) |

				FIELD_PREP(CN10K_TLX_BURST_MANTISSA, (u64)burst_mantissa) |

				FIELD_PREP(TLX_RATE_DIVIDER_EXPONENT, div_exp) |

				FIELD_PREP(TLX_RATE_EXPONENT, exp) |

				FIELD_PREP(TLX_RATE_MANTISSA, mantissa) | BIT_ULL(0);

	}



	return regval;

}



static int otx2_set_matchall_egress_rate(struct otx2_nic *nic,

					 u32 burst, u64 maxrate)

{

	struct otx2_hw *hw = &nic->hw;

	struct nix_txschq_config *req;

	int txschq, err;



	/* All SQs share the same TL4, so pick the first scheduler */

	txschq = hw->txschq_list[NIX_TXSCH_LVL_TL4][0];



	/* Get exponent and mantissa values from the desired rate */

	otx2_get_egress_burst_cfg(burst, &burst_exp, &burst_mantissa);

	otx2_get_egress_rate_cfg(maxrate, &exp, &mantissa, &div_exp);



	mutex_lock(&nic->mbox.lock);

	req = otx2_mbox_alloc_msg_nix_txschq_cfg(&nic->mbox);

	if (!req) {
@@ -157,11 +195,7 @@ static int otx2_set_matchall_egress_rate(struct otx2_nic *nic, u32 burst, u32 ma 
	req->lvl = NIX_TXSCH_LVL_TL4;

	req->num_regs = 1;

	req->reg[0] = NIX_AF_TL4X_PIR(txschq);

	req->regval[0] = FIELD_PREP(TLX_BURST_EXPONENT, burst_exp) |

			 FIELD_PREP(TLX_BURST_MANTISSA, burst_mantissa) |

			 FIELD_PREP(TLX_RATE_DIVIDER_EXPONENT, div_exp) |

			 FIELD_PREP(TLX_RATE_EXPONENT, exp) |

			 FIELD_PREP(TLX_RATE_MANTISSA, mantissa) | BIT_ULL(0);

	req->regval[0] = otx2_get_txschq_rate_regval(nic, maxrate, burst);



	err = otx2_sync_mbox_msg(&nic->mbox);

	mutex_unlock(&nic->mbox.lock);
@@ -230,7 +264,7 @@ static int otx2_tc_egress_matchall_install(struct otx2_nic *nic, 
	struct netlink_ext_ack *extack = cls->common.extack;

	struct flow_action *actions = &cls->rule->action;

	struct flow_action_entry *entry;

	u32 rate;

	u64 rate;

	int err;



	err = otx2_tc_validate_flow(nic, actions, extack);
@@ -256,7 +290,7 @@ static int otx2_tc_egress_matchall_install(struct otx2_nic *nic, 
		}

		/* Convert bytes per second to Mbps */

		rate = entry->police.rate_bytes_ps * 8;

		rate = max_t(u32, rate / 1000000, 1);

		rate = max_t(u64, rate / 1000000, 1);

		err = otx2_set_matchall_egress_rate(nic, entry->police.burst, rate);

		if (err)

			return err;
@@ -614,15 +648,20 @@ static int otx2_tc_prepare_flow(struct otx2_nic *nic, struct otx2_tc_flow *node, 


		flow_spec->dport = match.key->dst;

		flow_mask->dport = match.mask->dst;



		if (flow_mask->dport) {

			if (ip_proto == IPPROTO_UDP)

				req->features |= BIT_ULL(NPC_DPORT_UDP);

			else if (ip_proto == IPPROTO_TCP)

				req->features |= BIT_ULL(NPC_DPORT_TCP);

			else if (ip_proto == IPPROTO_SCTP)

				req->features |= BIT_ULL(NPC_DPORT_SCTP);

		}



		flow_spec->sport = match.key->src;

		flow_mask->sport = match.mask->src;



		if (flow_mask->sport) {

			if (ip_proto == IPPROTO_UDP)

				req->features |= BIT_ULL(NPC_SPORT_UDP);

			else if (ip_proto == IPPROTO_TCP)
@@ -630,6 +669,7 @@ static int otx2_tc_prepare_flow(struct otx2_nic *nic, struct otx2_tc_flow *node, 
			else if (ip_proto == IPPROTO_SCTP)

				req->features |= BIT_ULL(NPC_SPORT_SCTP);

		}

	}



	return otx2_tc_parse_actions(nic, &rule->action, req, f, node);

}