Unverified Commit 323e3246 authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
Browse files

!11963 serial: sc16is7xx: fix invalid FIFO access with special register set 

Merge Pull Request from: @ci-robot 
 
PR sync from: Gu Bowen <gubowen5@huawei.com>
https://mailweb.openeuler.org/hyperkitty/list/kernel@openeuler.org/message/MKQ44HPGI32YTZBSUWD7474JLGHK4K5I/ 
 
https://gitee.com/src-openeuler/kernel/issues/IAOY1A 
 
Link:https://gitee.com/openeuler/kernel/pulls/11963

 

Reviewed-by: default avatarZhang Peng <zhangpeng362@huawei.com>
Signed-off-by: default avatarZhang Peng <zhangpeng362@huawei.com>
parents 1f027a60 6044144b

drivers/tty/serial/sc16is7xx.c

+4 −0
Original line number Diff line number Diff line
@@ -545,6 +545,8 @@ static int sc16is7xx_set_baud(struct uart_port *port, int baud) 
			      SC16IS7XX_MCR_CLKSEL_BIT,

			      prescaler == 1 ? 0 : SC16IS7XX_MCR_CLKSEL_BIT);



	mutex_lock(&one->efr_lock);



	/* Open the LCR divisors for configuration */

	sc16is7xx_port_write(port, SC16IS7XX_LCR_REG,

			     SC16IS7XX_LCR_CONF_MODE_A);
@@ -558,6 +560,8 @@ static int sc16is7xx_set_baud(struct uart_port *port, int baud) 
	/* Put LCR back to the normal mode */

	sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr);



	mutex_unlock(&one->efr_lock);



	return DIV_ROUND_CLOSEST((clk / prescaler) / 16, div);

}