Commit 32030592 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'du-next-20220907' of git://linuxtv.org/pinchartl/media into drm-next 



- Misc fixes and improvements to the R-Car DU driver
- Synopsys DW HDMI bridge DT bindings update

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://patchwork.freedesktop.org/patch/msgid/YxkL+tRI8uXDCvj9@pendragon.ideasonboard.com
parents 849b1f33 cee3e583

Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml

+5 −0
Original line number Diff line number Diff line
@@ -38,6 +38,9 @@ properties: 
  clock-names:

    maxItems: 2



  resets:

    maxItems: 1



  ports:

    $ref: /schemas/graph.yaml#/properties/ports
@@ -67,6 +70,7 @@ required: 
  - reg

  - clocks

  - clock-names

  - resets

  - interrupts

  - ports
@@ -85,6 +89,7 @@ examples: 
        clocks = <&cpg CPG_CORE R8A7795_CLK_S0D4>, <&cpg CPG_MOD 729>;

        clock-names = "iahb", "isfr";

        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;

        resets = <&cpg 729>;



        ports {

            #address-cells = <1>;

drivers/gpu/drm/rcar-du/Makefile

+0 −7
Original line number Diff line number Diff line
@@ -14,10 +14,3 @@ obj-$(CONFIG_DRM_RCAR_DU) += rcar-du-drm.o 
obj-$(CONFIG_DRM_RCAR_DW_HDMI)		+= rcar_dw_hdmi.o

obj-$(CONFIG_DRM_RCAR_LVDS)		+= rcar_lvds.o

obj-$(CONFIG_DRM_RCAR_MIPI_DSI)		+= rcar_mipi_dsi.o
 


# 'remote-endpoint' is fixed up at run-time

DTC_FLAGS_rcar_du_of_lvds_r8a7790 += -Wno-graph_endpoint

DTC_FLAGS_rcar_du_of_lvds_r8a7791 += -Wno-graph_endpoint

DTC_FLAGS_rcar_du_of_lvds_r8a7793 += -Wno-graph_endpoint

DTC_FLAGS_rcar_du_of_lvds_r8a7795 += -Wno-graph_endpoint

DTC_FLAGS_rcar_du_of_lvds_r8a7796 += -Wno-graph_endpoint

drivers/gpu/drm/rcar-du/rcar_du_crtc.c

+28 −2
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@ 
#include "rcar_du_regs.h"

#include "rcar_du_vsp.h"

#include "rcar_lvds.h"

#include "rcar_mipi_dsi.h"



static u32 rcar_du_crtc_read(struct rcar_du_crtc *rcrtc, u32 reg)

{
@@ -744,7 +745,19 @@ static void rcar_du_crtc_atomic_enable(struct drm_crtc *crtc, 
		const struct drm_display_mode *mode =

			&crtc->state->adjusted_mode;



		rcar_lvds_clk_enable(bridge, mode->clock * 1000);

		rcar_lvds_pclk_enable(bridge, mode->clock * 1000);

	}



	/*

	 * Similarly to LVDS, on V3U the dot clock is provided by the DSI

	 * encoder, and we need to enable the DSI clocks before enabling the CRTC.

	 */

	if ((rcdu->info->dsi_clk_mask & BIT(rcrtc->index)) &&

	    (rstate->outputs &

	     (BIT(RCAR_DU_OUTPUT_DSI0) | BIT(RCAR_DU_OUTPUT_DSI1)))) {

		struct drm_bridge *bridge = rcdu->dsi[rcrtc->index];



		rcar_mipi_dsi_pclk_enable(bridge, state);

	}



	rcar_du_crtc_start(rcrtc);
@@ -777,7 +790,20 @@ static void rcar_du_crtc_atomic_disable(struct drm_crtc *crtc, 
		 * Disable the LVDS clock output, see

		 * rcar_du_crtc_atomic_enable().

		 */

		rcar_lvds_clk_disable(bridge);

		rcar_lvds_pclk_disable(bridge);

	}



	if ((rcdu->info->dsi_clk_mask & BIT(rcrtc->index)) &&

	    (rstate->outputs &

	     (BIT(RCAR_DU_OUTPUT_DSI0) | BIT(RCAR_DU_OUTPUT_DSI1)))) {

		struct drm_bridge *bridge = rcdu->dsi[rcrtc->index];



		/*

		 * Disable the DSI clock output, see

		 * rcar_du_crtc_atomic_enable().

		 */



		rcar_mipi_dsi_pclk_disable(bridge);

	}



	spin_lock_irq(&crtc->dev->event_lock);

drivers/gpu/drm/rcar-du/rcar_du_drv.c

+2 −2
Original line number Diff line number Diff line
@@ -27,7 +27,6 @@ 


#include "rcar_du_drv.h"

#include "rcar_du_kms.h"

#include "rcar_du_regs.h"



/* -----------------------------------------------------------------------------

 * Device Information
@@ -507,7 +506,8 @@ static const struct rcar_du_device_info rcar_du_r8a7799x_info = { 
static const struct rcar_du_device_info rcar_du_r8a779a0_info = {

	.gen = 3,

	.features = RCAR_DU_FEATURE_CRTC_IRQ

		  | RCAR_DU_FEATURE_VSP1_SOURCE,

		  | RCAR_DU_FEATURE_VSP1_SOURCE

		  | RCAR_DU_FEATURE_NO_BLENDING,

	.channels_mask = BIT(1) | BIT(0),

	.routes = {

		/* R8A779A0 has two MIPI DSI outputs. */

drivers/gpu/drm/rcar-du/rcar_du_drv.h

+3 −0
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@ struct rcar_du_device; 
#define RCAR_DU_FEATURE_VSP1_SOURCE	BIT(2)	/* Has inputs from VSP1 */

#define RCAR_DU_FEATURE_INTERLACED	BIT(3)	/* HW supports interlaced */

#define RCAR_DU_FEATURE_TVM_SYNC	BIT(4)	/* Has TV switch/sync modes */

#define RCAR_DU_FEATURE_NO_BLENDING	BIT(5)	/* PnMR.SPIM does not have ALP nor EOR bits */



#define RCAR_DU_QUIRK_ALIGN_128B	BIT(0)	/* Align pitches to 128 bytes */
@@ -91,6 +92,7 @@ struct rcar_du_device_info { 
#define RCAR_DU_MAX_GROUPS		DIV_ROUND_UP(RCAR_DU_MAX_CRTCS, 2)

#define RCAR_DU_MAX_VSPS		4

#define RCAR_DU_MAX_LVDS		2

#define RCAR_DU_MAX_DSI			2



struct rcar_du_device {

	struct device *dev;
@@ -107,6 +109,7 @@ struct rcar_du_device { 
	struct platform_device *cmms[RCAR_DU_MAX_CRTCS];

	struct rcar_du_vsp vsps[RCAR_DU_MAX_VSPS];

	struct drm_bridge *lvds[RCAR_DU_MAX_LVDS];

	struct drm_bridge *dsi[RCAR_DU_MAX_DSI];



	struct {

		struct drm_property *colorkey;