Commit cee3e583 authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Laurent Pinchart
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dt-bindings: display: bridge: renesas,dw-hdmi: Add resets property 



The DWC HDMI blocks on R-Car and RZ/G2 SoC's use resets, so to complete
the bindings include resets property.

This also fixes the below warning when running dtbs_check:
arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-rev2-ex-idk-1110wr.dtb: hdmi@fead0000: Unevaluated properties are not allowed ('resets' was unexpected)
	From schema: Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml

While at it mark resets property as required as all the DT sources
in the kernel specify resets and update the example node.

Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
parent 603c8e13

Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml

+5 −0
Original line number Diff line number Diff line
@@ -38,6 +38,9 @@ properties: 
  clock-names:

    maxItems: 2



  resets:

    maxItems: 1



  ports:

    $ref: /schemas/graph.yaml#/properties/ports
@@ -67,6 +70,7 @@ required: 
  - reg

  - clocks

  - clock-names

  - resets

  - interrupts

  - ports
@@ -85,6 +89,7 @@ examples: 
        clocks = <&cpg CPG_CORE R8A7795_CLK_S0D4>, <&cpg CPG_MOD 729>;

        clock-names = "iahb", "isfr";

        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;

        resets = <&cpg 729>;



        ports {

            #address-cells = <1>;