Unverified Commit 2ecfddb1 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'juno-fixes-5.15' of... 

Merge tag 'juno-fixes-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/fixes

 Juno/Vexpress fixes for v5.15

Bunch of DTS fixes to resolve addressing issues with some of the device
nodes, dropping unused/undocumented properties in various nodes, and
aligning node names with dtschema.

* tag 'juno-fixes-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm: dts: vexpress: Fix motherboard bus 'interrupt-map'
  arm: dts: vexpress: Fix addressing issues with 'motherboard-bus' nodes
  arm: dts: vexpress-v2p-ca9: Fix the SMB unit-address
  arm: dts: vexpress: Drop unused properties from motherboard node
  arm64: dts: arm: drop unused interrupt-names in MHU
  ARM: dts: arm: align watchdog and mmc node names with dtschema
  arm64: dts: arm: align watchdog and mmc node names with dtschema
  arm64: dts: fvp: Remove panel timings

Link: https://lore.kernel.org/r/20210927105249.3583380-1-sudeep.holla@arm.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents c147392b 319aeaf6

arch/arm/boot/dts/vexpress-v2m-rs1.dtsi

+60 −7
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ 
 * TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT

 * CHANGES TO vexpress-v2m.dtsi!

 */

#include <dt-bindings/interrupt-controller/arm-gic.h>



/ {

	v2m_fixed_3v3: fixed-regulator-0 {
@@ -101,16 +102,68 @@ 
	};



	bus@8000000 {

		motherboard-bus {

			model = "V2M-P1";

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;



		#interrupt-cells = <1>;

		interrupt-map-mask = <0 63>;

		interrupt-map = <0  0 &gic GIC_SPI  0 IRQ_TYPE_LEVEL_HIGH>,

				<0  1 &gic GIC_SPI  1 IRQ_TYPE_LEVEL_HIGH>,

				<0  2 &gic GIC_SPI  2 IRQ_TYPE_LEVEL_HIGH>,

				<0  3 &gic GIC_SPI  3 IRQ_TYPE_LEVEL_HIGH>,

				<0  4 &gic GIC_SPI  4 IRQ_TYPE_LEVEL_HIGH>,

				<0  5 &gic GIC_SPI  5 IRQ_TYPE_LEVEL_HIGH>,

				<0  6 &gic GIC_SPI  6 IRQ_TYPE_LEVEL_HIGH>,

				<0  7 &gic GIC_SPI  7 IRQ_TYPE_LEVEL_HIGH>,

				<0  8 &gic GIC_SPI  8 IRQ_TYPE_LEVEL_HIGH>,

				<0  9 &gic GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH>,

				<0 10 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,

				<0 11 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,

				<0 12 &gic GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,

				<0 13 &gic GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,

				<0 14 &gic GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,

				<0 15 &gic GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,

				<0 16 &gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,

				<0 17 &gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,

				<0 18 &gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,

				<0 19 &gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,

				<0 20 &gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,

				<0 21 &gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,

				<0 22 &gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,

				<0 23 &gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,

				<0 24 &gic GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,

				<0 25 &gic GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,

				<0 26 &gic GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,

				<0 27 &gic GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,

				<0 28 &gic GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,

				<0 29 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,

				<0 30 &gic GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,

				<0 31 &gic GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,

				<0 32 &gic GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,

				<0 33 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,

				<0 34 &gic GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,

				<0 35 &gic GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,

				<0 36 &gic GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,

				<0 37 &gic GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,

				<0 38 &gic GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,

				<0 39 &gic GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,

				<0 40 &gic GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,

				<0 41 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,

				<0 42 &gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;



		motherboard-bus@8000000 {

			arm,hbi = <0x190>;

			arm,vexpress,site = <0>;

			arm,v2m-memory-map = "rs1";

			compatible = "arm,vexpress,v2m-p1", "simple-bus";

			#address-cells = <2>; /* SMB chipselect number and offset */

			#size-cells = <1>;

			#interrupt-cells = <1>;

			ranges;

			ranges = <0 0 0x08000000 0x04000000>,

				 <1 0 0x14000000 0x04000000>,

				 <2 0 0x18000000 0x04000000>,

				 <3 0 0x1c000000 0x04000000>,

				 <4 0 0x0c000000 0x04000000>,

				 <5 0 0x10000000 0x04000000>;



			nor_flash: flash@0 {

				compatible = "arm,vexpress-flash", "cfi-flash";
@@ -215,7 +268,7 @@ 
					clock-names = "apb_pclk";

				};



				mmci@50000 {

				mmc@50000 {

					compatible = "arm,pl180", "arm,primecell";

					reg = <0x050000 0x1000>;

					interrupts = <9>, <10>;
@@ -275,7 +328,7 @@ 
					clock-names = "uartclk", "apb_pclk";

				};



				wdt@f0000 {

				watchdog@f0000 {

					compatible = "arm,sp805", "arm,primecell";

					reg = <0x0f0000 0x1000>;

					interrupts = <0>;

arch/arm/boot/dts/vexpress-v2m.dtsi

+60 −5
Original line number Diff line number Diff line
@@ -17,18 +17,73 @@ 
 * TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT

 * CHANGES TO vexpress-v2m-rs1.dtsi!

 */

#include <dt-bindings/interrupt-controller/arm-gic.h>



/ {

	bus@4000000 {

		motherboard {

			model = "V2M-P1";

	bus@40000000 {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x40000000 0x40000000 0x10000000>,

			 <0x10000000 0x10000000 0x00020000>;



		#interrupt-cells = <1>;

		interrupt-map-mask = <0 63>;

		interrupt-map = <0  0 &gic GIC_SPI  0 IRQ_TYPE_LEVEL_HIGH>,

				<0  1 &gic GIC_SPI  1 IRQ_TYPE_LEVEL_HIGH>,

				<0  2 &gic GIC_SPI  2 IRQ_TYPE_LEVEL_HIGH>,

				<0  3 &gic GIC_SPI  3 IRQ_TYPE_LEVEL_HIGH>,

				<0  4 &gic GIC_SPI  4 IRQ_TYPE_LEVEL_HIGH>,

				<0  5 &gic GIC_SPI  5 IRQ_TYPE_LEVEL_HIGH>,

				<0  6 &gic GIC_SPI  6 IRQ_TYPE_LEVEL_HIGH>,

				<0  7 &gic GIC_SPI  7 IRQ_TYPE_LEVEL_HIGH>,

				<0  8 &gic GIC_SPI  8 IRQ_TYPE_LEVEL_HIGH>,

				<0  9 &gic GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH>,

				<0 10 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,

				<0 11 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,

				<0 12 &gic GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,

				<0 13 &gic GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,

				<0 14 &gic GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,

				<0 15 &gic GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,

				<0 16 &gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,

				<0 17 &gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,

				<0 18 &gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,

				<0 19 &gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,

				<0 20 &gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,

				<0 21 &gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,

				<0 22 &gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,

				<0 23 &gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,

				<0 24 &gic GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,

				<0 25 &gic GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,

				<0 26 &gic GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,

				<0 27 &gic GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,

				<0 28 &gic GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,

				<0 29 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,

				<0 30 &gic GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,

				<0 31 &gic GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,

				<0 32 &gic GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,

				<0 33 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,

				<0 34 &gic GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,

				<0 35 &gic GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,

				<0 36 &gic GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,

				<0 37 &gic GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,

				<0 38 &gic GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,

				<0 39 &gic GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,

				<0 40 &gic GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,

				<0 41 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,

				<0 42 &gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;



		motherboard-bus@40000000 {

			arm,hbi = <0x190>;

			arm,vexpress,site = <0>;

			compatible = "arm,vexpress,v2m-p1", "simple-bus";

			#address-cells = <2>; /* SMB chipselect number and offset */

			#size-cells = <1>;

			#interrupt-cells = <1>;

			ranges;

			ranges = <0 0 0x40000000 0x04000000>,

				 <1 0 0x44000000 0x04000000>,

				 <2 0 0x48000000 0x04000000>,

				 <3 0 0x4c000000 0x04000000>,

				 <7 0 0x10000000 0x00020000>;



			flash@0,00000000 {

				compatible = "arm,vexpress-flash", "cfi-flash";

arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts

+1 −56
Original line number Diff line number Diff line
@@ -237,62 +237,7 @@ 
	};



	bus@8000000 {

		compatible = "simple-bus";



		#address-cells = <2>;

		#size-cells = <1>;

		ranges = <0 0 0 0x08000000 0x04000000>,

			 <1 0 0 0x14000000 0x04000000>,

			 <2 0 0 0x18000000 0x04000000>,

			 <3 0 0 0x1c000000 0x04000000>,

			 <4 0 0 0x0c000000 0x04000000>,

			 <5 0 0 0x10000000 0x04000000>;



		#interrupt-cells = <1>;

		interrupt-map-mask = <0 0 63>;

		interrupt-map = <0 0  0 &gic 0  0 4>,

				<0 0  1 &gic 0  1 4>,

				<0 0  2 &gic 0  2 4>,

				<0 0  3 &gic 0  3 4>,

				<0 0  4 &gic 0  4 4>,

				<0 0  5 &gic 0  5 4>,

				<0 0  6 &gic 0  6 4>,

				<0 0  7 &gic 0  7 4>,

				<0 0  8 &gic 0  8 4>,

				<0 0  9 &gic 0  9 4>,

				<0 0 10 &gic 0 10 4>,

				<0 0 11 &gic 0 11 4>,

				<0 0 12 &gic 0 12 4>,

				<0 0 13 &gic 0 13 4>,

				<0 0 14 &gic 0 14 4>,

				<0 0 15 &gic 0 15 4>,

				<0 0 16 &gic 0 16 4>,

				<0 0 17 &gic 0 17 4>,

				<0 0 18 &gic 0 18 4>,

				<0 0 19 &gic 0 19 4>,

				<0 0 20 &gic 0 20 4>,

				<0 0 21 &gic 0 21 4>,

				<0 0 22 &gic 0 22 4>,

				<0 0 23 &gic 0 23 4>,

				<0 0 24 &gic 0 24 4>,

				<0 0 25 &gic 0 25 4>,

				<0 0 26 &gic 0 26 4>,

				<0 0 27 &gic 0 27 4>,

				<0 0 28 &gic 0 28 4>,

				<0 0 29 &gic 0 29 4>,

				<0 0 30 &gic 0 30 4>,

				<0 0 31 &gic 0 31 4>,

				<0 0 32 &gic 0 32 4>,

				<0 0 33 &gic 0 33 4>,

				<0 0 34 &gic 0 34 4>,

				<0 0 35 &gic 0 35 4>,

				<0 0 36 &gic 0 36 4>,

				<0 0 37 &gic 0 37 4>,

				<0 0 38 &gic 0 38 4>,

				<0 0 39 &gic 0 39 4>,

				<0 0 40 &gic 0 40 4>,

				<0 0 41 &gic 0 41 4>,

				<0 0 42 &gic 0 42 4>;

		ranges = <0x8000000 0 0x8000000 0x18000000>;

	};



	site2: hsb@40000000 {

arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts

+1 −56
Original line number Diff line number Diff line
@@ -609,62 +609,7 @@ 
	};



	smb: bus@8000000 {

		compatible = "simple-bus";



		#address-cells = <2>;

		#size-cells = <1>;

		ranges = <0 0 0 0x08000000 0x04000000>,

			 <1 0 0 0x14000000 0x04000000>,

			 <2 0 0 0x18000000 0x04000000>,

			 <3 0 0 0x1c000000 0x04000000>,

			 <4 0 0 0x0c000000 0x04000000>,

			 <5 0 0 0x10000000 0x04000000>;



		#interrupt-cells = <1>;

		interrupt-map-mask = <0 0 63>;

		interrupt-map = <0 0  0 &gic 0  0 4>,

				<0 0  1 &gic 0  1 4>,

				<0 0  2 &gic 0  2 4>,

				<0 0  3 &gic 0  3 4>,

				<0 0  4 &gic 0  4 4>,

				<0 0  5 &gic 0  5 4>,

				<0 0  6 &gic 0  6 4>,

				<0 0  7 &gic 0  7 4>,

				<0 0  8 &gic 0  8 4>,

				<0 0  9 &gic 0  9 4>,

				<0 0 10 &gic 0 10 4>,

				<0 0 11 &gic 0 11 4>,

				<0 0 12 &gic 0 12 4>,

				<0 0 13 &gic 0 13 4>,

				<0 0 14 &gic 0 14 4>,

				<0 0 15 &gic 0 15 4>,

				<0 0 16 &gic 0 16 4>,

				<0 0 17 &gic 0 17 4>,

				<0 0 18 &gic 0 18 4>,

				<0 0 19 &gic 0 19 4>,

				<0 0 20 &gic 0 20 4>,

				<0 0 21 &gic 0 21 4>,

				<0 0 22 &gic 0 22 4>,

				<0 0 23 &gic 0 23 4>,

				<0 0 24 &gic 0 24 4>,

				<0 0 25 &gic 0 25 4>,

				<0 0 26 &gic 0 26 4>,

				<0 0 27 &gic 0 27 4>,

				<0 0 28 &gic 0 28 4>,

				<0 0 29 &gic 0 29 4>,

				<0 0 30 &gic 0 30 4>,

				<0 0 31 &gic 0 31 4>,

				<0 0 32 &gic 0 32 4>,

				<0 0 33 &gic 0 33 4>,

				<0 0 34 &gic 0 34 4>,

				<0 0 35 &gic 0 35 4>,

				<0 0 36 &gic 0 36 4>,

				<0 0 37 &gic 0 37 4>,

				<0 0 38 &gic 0 38 4>,

				<0 0 39 &gic 0 39 4>,

				<0 0 40 &gic 0 40 4>,

				<0 0 41 &gic 0 41 4>,

				<0 0 42 &gic 0 42 4>;

		ranges = <0x8000000 0 0x8000000 0x18000000>;

	};



	site2: hsb@40000000 {

arch/arm/boot/dts/vexpress-v2p-ca5s.dts

+1 −56
Original line number Diff line number Diff line
@@ -207,62 +207,7 @@ 
	};



	smb: bus@8000000 {

		compatible = "simple-bus";



		#address-cells = <2>;

		#size-cells = <1>;

		ranges = <0 0 0x08000000 0x04000000>,

			 <1 0 0x14000000 0x04000000>,

			 <2 0 0x18000000 0x04000000>,

			 <3 0 0x1c000000 0x04000000>,

			 <4 0 0x0c000000 0x04000000>,

			 <5 0 0x10000000 0x04000000>;



		#interrupt-cells = <1>;

		interrupt-map-mask = <0 0 63>;

		interrupt-map = <0 0  0 &gic 0  0 4>,

				<0 0  1 &gic 0  1 4>,

				<0 0  2 &gic 0  2 4>,

				<0 0  3 &gic 0  3 4>,

				<0 0  4 &gic 0  4 4>,

				<0 0  5 &gic 0  5 4>,

				<0 0  6 &gic 0  6 4>,

				<0 0  7 &gic 0  7 4>,

				<0 0  8 &gic 0  8 4>,

				<0 0  9 &gic 0  9 4>,

				<0 0 10 &gic 0 10 4>,

				<0 0 11 &gic 0 11 4>,

				<0 0 12 &gic 0 12 4>,

				<0 0 13 &gic 0 13 4>,

				<0 0 14 &gic 0 14 4>,

				<0 0 15 &gic 0 15 4>,

				<0 0 16 &gic 0 16 4>,

				<0 0 17 &gic 0 17 4>,

				<0 0 18 &gic 0 18 4>,

				<0 0 19 &gic 0 19 4>,

				<0 0 20 &gic 0 20 4>,

				<0 0 21 &gic 0 21 4>,

				<0 0 22 &gic 0 22 4>,

				<0 0 23 &gic 0 23 4>,

				<0 0 24 &gic 0 24 4>,

				<0 0 25 &gic 0 25 4>,

				<0 0 26 &gic 0 26 4>,

				<0 0 27 &gic 0 27 4>,

				<0 0 28 &gic 0 28 4>,

				<0 0 29 &gic 0 29 4>,

				<0 0 30 &gic 0 30 4>,

				<0 0 31 &gic 0 31 4>,

				<0 0 32 &gic 0 32 4>,

				<0 0 33 &gic 0 33 4>,

				<0 0 34 &gic 0 34 4>,

				<0 0 35 &gic 0 35 4>,

				<0 0 36 &gic 0 36 4>,

				<0 0 37 &gic 0 37 4>,

				<0 0 38 &gic 0 38 4>,

				<0 0 39 &gic 0 39 4>,

				<0 0 40 &gic 0 40 4>,

				<0 0 41 &gic 0 41 4>,

				<0 0 42 &gic 0 42 4>;

		ranges = <0 0x8000000 0x18000000>;

	};



	site2: hsb@40000000 {