Commit 2d99bfbf authored by Biju Das's avatar Biju Das Committed by Marc Kleine-Budde
Browse files

can: sja1000: Add Quirk for RZ/N1 SJA1000 CAN controller 

As per Chapter 6.5.16 of the RZ/N1 Peripheral Manual, The SJA1000
CAN controller does not support Clock Divider Register compared to
the reference Philips SJA1000 device.

This patch adds a device quirk to handle this difference.

Link: https://lore.kernel.org/all/20220710115248.190280-4-biju.das.jz@bp.renesas.com


Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: default avatarMarc Kleine-Budde <mkl@pengutronix.de>
parent 4591c760

drivers/net/can/sja1000/sja1000.c

+5 −3
Original line number Diff line number Diff line
@@ -183,6 +183,7 @@ static void chipset_init(struct net_device *dev) 
{

	struct sja1000_priv *priv = netdev_priv(dev);



	if (!(priv->flags & SJA1000_QUIRK_NO_CDR_REG))

		/* set clock divider and output control register */

		priv->write_reg(priv, SJA1000_CDR, priv->cdr | CDR_PELICAN);
@@ -209,7 +210,8 @@ static void sja1000_start(struct net_device *dev) 
		set_reset_mode(dev);



	/* Initialize chip if uninitialized at this stage */

	if (!(priv->read_reg(priv, SJA1000_CDR) & CDR_PELICAN))

	if (!(priv->flags & SJA1000_QUIRK_NO_CDR_REG ||

	      priv->read_reg(priv, SJA1000_CDR) & CDR_PELICAN))

		chipset_init(dev);



	/* Clear error counters and error code capture */

drivers/net/can/sja1000/sja1000.h

+2 −1
Original line number Diff line number Diff line
@@ -145,7 +145,8 @@ 
/*

 * Flags for sja1000priv.flags

 */

#define SJA1000_CUSTOM_IRQ_HANDLER 0x1

#define SJA1000_CUSTOM_IRQ_HANDLER	BIT(0)

#define SJA1000_QUIRK_NO_CDR_REG	BIT(1)



/*

 * SJA1000 private data structure