!4032 intel: add TPMI base driver support for GNR

Merge Pull Request from: @jiayingbao 
 
The TPMI (Topology Aware Register and PM Capsule Interface) provides a
flexible, extendable and PCIe enumerable MMIO interface for PM features.
The TPMI interface uses a PCI VSEC structure to expose the location of
MMIO region.
this change include:
Move PMT from MFD bus to auxiliary bus 
add intel_vsec for PMT/TPMI
backport bugfix for PMT
add TPMI base driver support on BHS platforms. RAPL, ISST, UFS are dependent on this driver.

Test:
tpmi debugfs function memdump and write pass.
telemetry function read/write test pass.
config:
+CONFIG_INTEL_TPMI=m
+CONFIG_AUXILIARY_BUS=y
-CONFIG_MFD_INTEL_PMT=m
+CONFIG_INTEL_VSEC=m
 
 
Link:https://gitee.com/openeuler/kernel/pulls/4032

 

Reviewed-by: Xu Kuohai <xukuohai@huawei.com>
Reviewed-by: Jason Zeng <jason.zeng@intel.com>
Reviewed-by: Aichun Shi <aichun.shi@intel.com>
Reviewed-by: Weilong Chen <chenweilong@huawei.com>
Signed-off-by: Jialin Zhang <zhangjialin11@huawei.com>