Commit 2acdaf59 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk driver fixes from Stephen Boyd:

 - Fix qcom mux logic to look at the proper parent table member. Luckily
   this clk type isn't very common.

 - Don't kill clks on qcom systems that use Trion PLLs that are enabled
   out of the bootloader. We will simply skip programming the PLL rate
   if it's already done.

 - Use the proper clk_ops for the qcom sm6125 ICE clks.

 - Use module_platform_driver() in i.MX as it can be a module.

 - Fix a UAF in the versatile clk driver on an error path.

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: versatile: clk-icst: use after free on error path
  clk: qcom: sm6125-gcc: Swap ops of ice and apps on sdcc1
  clk: imx: use module_platform_driver
  clk: qcom: clk-alpha-pll: Don't reconfigure running Trion
  clk: qcom: regmap-mux: fix parent clock lookup
parents a84e0b31 2d4fcc5a
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+1 −1
Original line number Diff line number Diff line
@@ -370,7 +370,7 @@ static struct platform_driver imx8qxp_lpcg_clk_driver = {
	.probe = imx8qxp_lpcg_clk_probe,
};

builtin_platform_driver(imx8qxp_lpcg_clk_driver);
module_platform_driver(imx8qxp_lpcg_clk_driver);

MODULE_AUTHOR("Aisheng Dong <aisheng.dong@nxp.com>");
MODULE_DESCRIPTION("NXP i.MX8QXP LPCG clock driver");
+1 −1
Original line number Diff line number Diff line
@@ -308,7 +308,7 @@ static struct platform_driver imx8qxp_clk_driver = {
	},
	.probe = imx8qxp_clk_probe,
};
builtin_platform_driver(imx8qxp_clk_driver);
module_platform_driver(imx8qxp_clk_driver);

MODULE_AUTHOR("Aisheng Dong <aisheng.dong@nxp.com>");
MODULE_DESCRIPTION("NXP i.MX8QXP clock driver");
+9 −0
Original line number Diff line number Diff line
@@ -1429,6 +1429,15 @@ EXPORT_SYMBOL_GPL(clk_alpha_pll_postdiv_fabia_ops);
void clk_trion_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
			     const struct alpha_pll_config *config)
{
	/*
	 * If the bootloader left the PLL enabled it's likely that there are
	 * RCGs that will lock up if we disable the PLL below.
	 */
	if (trion_pll_is_enabled(pll, regmap)) {
		pr_debug("Trion PLL is already enabled, skipping configuration\n");
		return;
	}

	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);
	regmap_write(regmap, PLL_CAL_L_VAL(pll), TRION_PLL_CAL_VAL);
	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);
+1 −1
Original line number Diff line number Diff line
@@ -28,7 +28,7 @@ static u8 mux_get_parent(struct clk_hw *hw)
	val &= mask;

	if (mux->parent_map)
		return qcom_find_src_index(hw, mux->parent_map, val);
		return qcom_find_cfg_index(hw, mux->parent_map, val);

	return val;
}
+12 −0
Original line number Diff line number Diff line
@@ -69,6 +69,18 @@ int qcom_find_src_index(struct clk_hw *hw, const struct parent_map *map, u8 src)
}
EXPORT_SYMBOL_GPL(qcom_find_src_index);

int qcom_find_cfg_index(struct clk_hw *hw, const struct parent_map *map, u8 cfg)
{
	int i, num_parents = clk_hw_get_num_parents(hw);

	for (i = 0; i < num_parents; i++)
		if (cfg == map[i].cfg)
			return i;

	return -ENOENT;
}
EXPORT_SYMBOL_GPL(qcom_find_cfg_index);

struct regmap *
qcom_cc_map(struct platform_device *pdev, const struct qcom_cc_desc *desc)
{
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