Loading drivers/gpu/drm/radeon/ni.c +8 −0 Original line number Diff line number Diff line Loading @@ -692,6 +692,14 @@ int ni_init_microcode(struct radeon_device *rdev) return err; } int tn_get_temp(struct radeon_device *rdev) { u32 temp = RREG32_SMC(TN_CURRENT_GNB_TEMP) & 0x7ff; int actual_temp = (temp / 8) - 49; return actual_temp * 1000; } /* * Core functions */ Loading drivers/gpu/drm/radeon/nid.h +3 −0 Original line number Diff line number Diff line Loading @@ -489,6 +489,9 @@ # define CACHE_FLUSH_AND_INV_EVENT_TS (0x14 << 0) # define CACHE_FLUSH_AND_INV_EVENT (0x16 << 0) /* TN SMU registers */ #define TN_CURRENT_GNB_TEMP 0x1F390 /* * UVD */ Loading drivers/gpu/drm/radeon/radeon_asic.c +1 −0 Original line number Diff line number Diff line Loading @@ -1897,6 +1897,7 @@ static struct radeon_asic trinity_asic = { .set_pcie_lanes = NULL, .set_clock_gating = NULL, .set_uvd_clocks = &sumo_set_uvd_clocks, .get_temperature = &tn_get_temp, }, .pflip = { .pre_page_flip = &evergreen_pre_page_flip, Loading drivers/gpu/drm/radeon/radeon_asic.h +1 −0 Original line number Diff line number Diff line Loading @@ -492,6 +492,7 @@ void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable); void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode); int evergreen_get_temp(struct radeon_device *rdev); int sumo_get_temp(struct radeon_device *rdev); int tn_get_temp(struct radeon_device *rdev); /* * cayman Loading Loading
drivers/gpu/drm/radeon/ni.c +8 −0 Original line number Diff line number Diff line Loading @@ -692,6 +692,14 @@ int ni_init_microcode(struct radeon_device *rdev) return err; } int tn_get_temp(struct radeon_device *rdev) { u32 temp = RREG32_SMC(TN_CURRENT_GNB_TEMP) & 0x7ff; int actual_temp = (temp / 8) - 49; return actual_temp * 1000; } /* * Core functions */ Loading
drivers/gpu/drm/radeon/nid.h +3 −0 Original line number Diff line number Diff line Loading @@ -489,6 +489,9 @@ # define CACHE_FLUSH_AND_INV_EVENT_TS (0x14 << 0) # define CACHE_FLUSH_AND_INV_EVENT (0x16 << 0) /* TN SMU registers */ #define TN_CURRENT_GNB_TEMP 0x1F390 /* * UVD */ Loading
drivers/gpu/drm/radeon/radeon_asic.c +1 −0 Original line number Diff line number Diff line Loading @@ -1897,6 +1897,7 @@ static struct radeon_asic trinity_asic = { .set_pcie_lanes = NULL, .set_clock_gating = NULL, .set_uvd_clocks = &sumo_set_uvd_clocks, .get_temperature = &tn_get_temp, }, .pflip = { .pre_page_flip = &evergreen_pre_page_flip, Loading
drivers/gpu/drm/radeon/radeon_asic.h +1 −0 Original line number Diff line number Diff line Loading @@ -492,6 +492,7 @@ void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable); void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode); int evergreen_get_temp(struct radeon_device *rdev); int sumo_get_temp(struct radeon_device *rdev); int tn_get_temp(struct radeon_device *rdev); /* * cayman Loading