Commit 2524dae5 authored by Imran Shaik's avatar Imran Shaik Committed by Bjorn Andersson
Browse files

clk: qcom: gcc-qdu1000: Fix clkref clocks handling



Update the GCC clkref clock's halt_check to BRANCH_HALT, as it's
status bit is not inverted in the latest hardware version of QDU1000
and QRU1000 SoCs. While at it, fix the gcc clkref clock ops as well.

Fixes: 1c9efb0b ("clk: qcom: Add QDU1000 and QRU1000 GCC support")
Signed-off-by: default avatarImran Shaik <quic_imrashai@quicinc.com>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230803105741.2292309-4-quic_imrashai@quicinc.com


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent b311f5d3
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+4 −6
Original line number Diff line number Diff line
@@ -1447,14 +1447,13 @@ static struct clk_branch gcc_pcie_0_cfg_ahb_clk = {

static struct clk_branch gcc_pcie_0_clkref_en = {
	.halt_reg = 0x9c004,
	.halt_bit = 31,
	.halt_check = BRANCH_HALT_ENABLE,
	.halt_check = BRANCH_HALT,
	.clkr = {
		.enable_reg = 0x9c004,
		.enable_mask = BIT(0),
		.hw.init = &(const struct clk_init_data) {
			.name = "gcc_pcie_0_clkref_en",
			.ops = &clk_branch_ops,
			.ops = &clk_branch2_ops,
		},
	},
};
@@ -2274,14 +2273,13 @@ static struct clk_branch gcc_tsc_etu_clk = {

static struct clk_branch gcc_usb2_clkref_en = {
	.halt_reg = 0x9c008,
	.halt_bit = 31,
	.halt_check = BRANCH_HALT_ENABLE,
	.halt_check = BRANCH_HALT,
	.clkr = {
		.enable_reg = 0x9c008,
		.enable_mask = BIT(0),
		.hw.init = &(const struct clk_init_data) {
			.name = "gcc_usb2_clkref_en",
			.ops = &clk_branch_ops,
			.ops = &clk_branch2_ops,
		},
	},
};