iommu/arm-smmu-v3: add bit field SFM into GERROR_ERR_MASK

mainline inclusion
from mainline-v5.13-rc1
commit 655c447c
category: bugfix
bugzilla: 71819
CVE: NA

-------------------------------------------------

In arm_smmu_gerror_handler(), the value of the SMMU_GERROR register is
filtered by GERROR_ERR_MASK. However, the GERROR_ERR_MASK does not contain
the SFM bit. As a result, the subsequent error processing is not performed
when only the SFM error occurs.

Fixes: 48ec83bc ("iommu/arm-smmu: Add initial driver support for ARM SMMUv3 devices")
Reported-by: Rui Zhu <zhurui3@huawei.com>
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Link: https://lore.kernel.org/r/20210324081603.1074-1-thunder.leizhen@huawei.com


Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Chen Wandun <chenwandun@huawei.com>
Reviewed-by: tong tiangen <tongtiangen@huawei.com>
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>