Commit 242d8ee9 authored by Peng Fan's avatar Peng Fan Committed by Shawn Guo
Browse files

arm64: dts: imx8mp-phyboard-pollux-rdk: correct i2c2 & mmc settings 



BIT3 and BIT0 are reserved bits, should not touch.

Fixes: 88f7f6bc ("arm64: dts: freescale: Add support for phyBOARD-Pollux-i.MX8MP")
Signed-off-by: default avatarPeng Fan <peng.fan@nxp.com>
Reviewed-by: default avatarRasmus Villemoes <rasmus.villemoes@prevas.dk>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent bae4de61

arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts

+8 −8
Original line number Diff line number Diff line
@@ -136,21 +136,21 @@ 


	pinctrl_i2c2: i2c2grp {

		fsl,pins = <

			MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL		0x400001c3

			MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA		0x400001c3

			MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL		0x400001c2

			MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA		0x400001c2

		>;

	};



	pinctrl_i2c2_gpio: i2c2gpiogrp {

		fsl,pins = <

			MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16	0x1e3

			MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17	0x1e3

			MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16	0x1e2

			MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17	0x1e2

		>;

	};



	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {

		fsl,pins = <

			MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19	0x41

			MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19	0x40

		>;

	};
@@ -175,7 +175,7 @@ 
			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d0

			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d0

			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d0

			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc1

			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc0

		>;

	};
@@ -187,7 +187,7 @@ 
			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d4

			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d4

			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d4

			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc1

			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc0

		>;

	};
@@ -199,7 +199,7 @@ 
			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d6

			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d6

			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d6

			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc1

			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc0

		>;

	};

};