Commit 213cb76d authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-gt-next-2022-09-09' of... 

Merge tag 'drm-intel-gt-next-2022-09-09' of git://anongit.freedesktop.org/drm/drm-intel into drm-next

UAPI Changes:

- Revert "drm/i915/dg2: Add preemption changes for Wa_14015141709"

  The intent of Wa_14015141709 was to inform us that userspace can no
  longer control object-level preemption as it has on past platforms
  (i.e., by twiddling register bit CS_CHICKEN1[0]).  The description of
  the workaround in the spec wasn't terribly well-written, and when we
  requested clarification from the hardware teams we were told that on the
  kernel side we should also probably stop setting
  FF_SLICE_CS_CHICKEN1[14], which is the register bit that directs the
  hardware to honor the settings in per-context register CS_CHICKEN1.  It
  turns out that this guidance about FF_SLICE_CS_CHICKEN1[14] was a
  mistake; even though CS_CHICKEN1[0] is non-operational and useless to
  userspace, there are other bits in the register that do still work and
  might need to be adjusted by userspace in the future (e.g., to implement
  other workarounds that show up).  If we don't set
  FF_SLICE_CS_CHICKEN1[14] in i915, then those future workarounds would
  not take effect.

  Even more details at:

  https://lists.freedesktop.org/archives/intel-gfx/2022-September/305478.html



Driver Changes:

- Align GuC/HuC firmware versioning scheme to kernel practices (John)
- Fix #6639: h264 hardware video decoding broken in 5.19 on Intel(R)
  Celeron(R) N3060 (Nirmoy)
- Meteorlake (MTL) enabling (Matt R)
- GuC SLPC improvements (Vinay, Rodrigo)
- Add thread execution tuning setting for ATS-M (Matt R)
- Don't start PXP without mei_pxp bind (Juston)
- Remove leftover verbose debug logging from GuC error capture (John)
- Abort suspend on low system memory conditions (Nirmoy, Matt A, Chris)
- Add DG2 Wa_16014892111 (Matt R)

- Rename ggtt_view as gtt_view (Niranjana)
- Consider HAS_FLAT_CCS() in needs_ccs_pages (Matt A)
- Don't try to disable host RPS when this was never enabled. (Rodrigo)
- Clear stalled GuC CT request after a reset (Daniele)
- Remove runtime info printing from GuC time stamp logging (Jani)
- Skip Bit12 fw domain reset for gen12+ (Sushma, Radhakrishna)

- Make GuC log sizes runtime configurable (John)
- Selftest improvements (Daniele, Matt B, Andrzej)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/YxshfqUN+vDe92Zn@jlahtine-mobl.ger.corp.intel.com
parents 47519d82 04f7eb3d

drivers/gpu/drm/i915/display/intel_display.c

+1 −1
Original line number Diff line number Diff line
@@ -670,7 +670,7 @@ bool intel_plane_uses_fence(const struct intel_plane_state *plane_state) 


	return DISPLAY_VER(dev_priv) < 4 ||

		(plane->fbc &&

		 plane_state->view.gtt.type == I915_GGTT_VIEW_NORMAL);

		 plane_state->view.gtt.type == I915_GTT_VIEW_NORMAL);

}



/*

drivers/gpu/drm/i915/display/intel_display.h

+1 −1
Original line number Diff line number Diff line
@@ -45,7 +45,7 @@ struct drm_modeset_acquire_ctx; 
struct drm_plane;

struct drm_plane_state;

struct i915_address_space;

struct i915_ggtt_view;

struct i915_gtt_view;

struct intel_atomic_state;

struct intel_crtc;

struct intel_crtc_state;

drivers/gpu/drm/i915/display/intel_display_types.h

+1 −1
Original line number Diff line number Diff line
@@ -105,7 +105,7 @@ struct intel_fb_view { 
	 * In the normal view the FB object's backing store sg list is used

	 * directly and hence the remap information here is not used.

	 */

	struct i915_ggtt_view gtt;

	struct i915_gtt_view gtt;



	/*

	 * The GTT view (gtt.type) specific information for each FB color

drivers/gpu/drm/i915/display/intel_fb.c

+9 −9
Original line number Diff line number Diff line
@@ -1395,7 +1395,7 @@ static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_p 
			       plane_view_height_tiles(fb, color_plane, dims, y));

	}



	if (view->gtt.type == I915_GGTT_VIEW_ROTATED) {

	if (view->gtt.type == I915_GTT_VIEW_ROTATED) {

		drm_WARN_ON(&i915->drm, remap_info->linear);

		check_array_bounds(i915, view->gtt.rotated.plane, color_plane);
@@ -1420,7 +1420,7 @@ static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_p 
		/* rotate the tile dimensions to match the GTT view */

		swap(tile_width, tile_height);

	} else {

		drm_WARN_ON(&i915->drm, view->gtt.type != I915_GGTT_VIEW_REMAPPED);

		drm_WARN_ON(&i915->drm, view->gtt.type != I915_GTT_VIEW_REMAPPED);



		check_array_bounds(i915, view->gtt.remapped.plane, color_plane);
@@ -1503,12 +1503,12 @@ calc_plane_normal_size(const struct intel_framebuffer *fb, int color_plane, 
}



static void intel_fb_view_init(struct drm_i915_private *i915, struct intel_fb_view *view,

			       enum i915_ggtt_view_type view_type)

			       enum i915_gtt_view_type view_type)

{

	memset(view, 0, sizeof(*view));

	view->gtt.type = view_type;



	if (view_type == I915_GGTT_VIEW_REMAPPED && IS_ALDERLAKE_P(i915))

	if (view_type == I915_GTT_VIEW_REMAPPED && IS_ALDERLAKE_P(i915))

		view->gtt.remapped.plane_alignment = SZ_2M / PAGE_SIZE;

}
@@ -1530,16 +1530,16 @@ int intel_fill_fb_info(struct drm_i915_private *i915, struct intel_framebuffer * 
	int i, num_planes = fb->base.format->num_planes;

	unsigned int tile_size = intel_tile_size(i915);



	intel_fb_view_init(i915, &fb->normal_view, I915_GGTT_VIEW_NORMAL);

	intel_fb_view_init(i915, &fb->normal_view, I915_GTT_VIEW_NORMAL);



	drm_WARN_ON(&i915->drm,

		    intel_fb_supports_90_270_rotation(fb) &&

		    intel_fb_needs_pot_stride_remap(fb));



	if (intel_fb_supports_90_270_rotation(fb))

		intel_fb_view_init(i915, &fb->rotated_view, I915_GGTT_VIEW_ROTATED);

		intel_fb_view_init(i915, &fb->rotated_view, I915_GTT_VIEW_ROTATED);

	if (intel_fb_needs_pot_stride_remap(fb))

		intel_fb_view_init(i915, &fb->remapped_view, I915_GGTT_VIEW_REMAPPED);

		intel_fb_view_init(i915, &fb->remapped_view, I915_GTT_VIEW_REMAPPED);



	for (i = 0; i < num_planes; i++) {

		struct fb_plane_view_dims view_dims;
@@ -1620,8 +1620,8 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state) 
	u32 gtt_offset = 0;



	intel_fb_view_init(i915, &plane_state->view,

			   drm_rotation_90_or_270(rotation) ? I915_GGTT_VIEW_ROTATED :

							      I915_GGTT_VIEW_REMAPPED);

			   drm_rotation_90_or_270(rotation) ? I915_GTT_VIEW_ROTATED :

							      I915_GTT_VIEW_REMAPPED);



	src_x = plane_state->uapi.src.x1 >> 16;

	src_y = plane_state->uapi.src.y1 >> 16;

drivers/gpu/drm/i915/display/intel_fb_pin.c

+2 −2
Original line number Diff line number Diff line
@@ -18,7 +18,7 @@ 


static struct i915_vma *

intel_pin_fb_obj_dpt(struct drm_framebuffer *fb,

		     const struct i915_ggtt_view *view,

		     const struct i915_gtt_view *view,

		     bool uses_fence,

		     unsigned long *out_flags,

		     struct i915_address_space *vm)
@@ -79,7 +79,7 @@ intel_pin_fb_obj_dpt(struct drm_framebuffer *fb, 
struct i915_vma *

intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,

			   bool phys_cursor,

			   const struct i915_ggtt_view *view,

			   const struct i915_gtt_view *view,

			   bool uses_fence,

			   unsigned long *out_flags)

{