Unverified Commit 20bd67eb authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
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!469 OLK-5.10: x86/cpu: Add several Intel server CPU model numbers 

Merge Pull Request from: @quanxian-2021 
 
Title: x86/cpu: Add several Intel server CPU model numbers
 
Content:
x86/cpu: Add several Intel server CPU model numbers

These servers are all on the public versions of the roadmap. The model
numbers for Grand Ridge, Granite Rapids, and Sierra Forest were included
in the September 2022 edition of the Instruction Set Extensions document.
 
Intel-kernel issue:
https://gitee.com/openeuler/intel-kernel/issues/I6M81K
 
Test:
Boot test on EMR/GNR/SF server
 
Known issue:
N/A
 
Default config change:
N/A 
 
Link:https://gitee.com/openeuler/kernel/pulls/469

 

Reviewed-by: default avatarJason Zeng <jason.zeng@intel.com>
Reviewed-by: default avatarAichun Shi <aichun.shi@intel.com>
Signed-off-by: default avatarJialin Zhang <zhangjialin11@huawei.com>
parents 53a9078e 100e58c7

arch/x86/include/asm/intel-family.h

+10 −1
Original line number Diff line number Diff line
@@ -103,10 +103,15 @@ 


#define INTEL_FAM6_SAPPHIRERAPIDS_X	0x8F	/* Golden Cove */



#define INTEL_FAM6_EMERALDRAPIDS_X	0xCF



#define INTEL_FAM6_GRANITERAPIDS_X	0xAD

#define INTEL_FAM6_GRANITERAPIDS_D	0xAE



#define INTEL_FAM6_ALDERLAKE		0x97	/* Golden Cove / Gracemont */

#define INTEL_FAM6_ALDERLAKE_L		0x9A	/* Golden Cove / Gracemont */



/* "Small Core" Processors (Atom) */

/* "Small Core" Processors (Atom/E-Core) */



#define INTEL_FAM6_ATOM_BONNELL		0x1C /* Diamondville, Pineview */

#define INTEL_FAM6_ATOM_BONNELL_MID	0x26 /* Silverthorne, Lincroft */
@@ -133,6 +138,10 @@ 
#define INTEL_FAM6_ATOM_TREMONT		0x96 /* Elkhart Lake */

#define INTEL_FAM6_ATOM_TREMONT_L	0x9C /* Jasper Lake */



#define INTEL_FAM6_SIERRAFOREST_X	0xAF



#define INTEL_FAM6_GRANDRIDGE		0xB6



/* Xeon Phi */



#define INTEL_FAM6_XEON_PHI_KNL		0x57 /* Knights Landing */