Unverified Commit 1ffe6ddc authored by Conor Dooley's avatar Conor Dooley Committed by Palmer Dabbelt
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dt-bindings: riscv: cpus: switch to unevaluatedProperties: false 



To permit validation of cpu nodes, swap "additionalProperties: true"
out for "unevaluatedProperties: false".

Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Acked-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
Link: https://lore.kernel.org/r/20230615-viper-stoic-1ff8efd7d51d@spud


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent 3c1b4758

Documentation/devicetree/bindings/riscv/cpus.yaml

+1 −1
Original line number Diff line number Diff line
@@ -143,7 +143,7 @@ required: 
  - riscv,isa

  - interrupt-controller



additionalProperties: true

unevaluatedProperties: false



examples:

  - |