Commit 1ff166c9 authored by Samin Guo's avatar Samin Guo Committed by Conor Dooley
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riscv: dts: starfive: jh7110: Add ethernet device nodes 



Add JH7110 ethernet device node to support gmac driver for the JH7110
RISC-V SoC.

Tested-by: default avatarTommaso Merciai <tomm.merciai@gmail.com>
Signed-off-by: default avatarYanhong Wang <yanhong.wang@starfivetech.com>
Signed-off-by: default avatarSamin Guo <samin.guo@starfivetech.com>
Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
parent 3e6670a2

arch/riscv/boot/dts/starfive/jh7110.dtsi

+69 −0
Original line number Diff line number Diff line
@@ -276,6 +276,13 @@ 
		#clock-cells = <0>;

	};



	stmmac_axi_setup: stmmac-axi-config {

		snps,lpi_en;

		snps,wr_osr_lmt = <4>;

		snps,rd_osr_lmt = <4>;

		snps,blen = <256 128 64 32 0 0 0>;

	};



	tdm_ext: tdm-ext-clock {

		compatible = "fixed-clock";

		clock-output-names = "tdm_ext";
@@ -564,6 +571,68 @@ 
				 <&syscrg JH7110_SYSRST_WDT_CORE>;

		};



		gmac0: ethernet@16030000 {

			compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";

			reg = <0x0 0x16030000 0x0 0x10000>;

			clocks = <&aoncrg JH7110_AONCLK_GMAC0_AXI>,

				 <&aoncrg JH7110_AONCLK_GMAC0_AHB>,

				 <&syscrg JH7110_SYSCLK_GMAC0_PTP>,

				 <&aoncrg JH7110_AONCLK_GMAC0_TX_INV>,

				 <&syscrg JH7110_SYSCLK_GMAC0_GTXC>;

			clock-names = "stmmaceth", "pclk", "ptp_ref",

				      "tx", "gtx";

			resets = <&aoncrg JH7110_AONRST_GMAC0_AXI>,

				 <&aoncrg JH7110_AONRST_GMAC0_AHB>;

			reset-names = "stmmaceth", "ahb";

			interrupts = <7>, <6>, <5>;

			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";

			rx-fifo-depth = <2048>;

			tx-fifo-depth = <2048>;

			snps,multicast-filter-bins = <64>;

			snps,perfect-filter-entries = <8>;

			snps,fixed-burst;

			snps,no-pbl-x8;

			snps,force_thresh_dma_mode;

			snps,axi-config = <&stmmac_axi_setup>;

			snps,tso;

			snps,en-tx-lpi-clockgating;

			snps,txpbl = <16>;

			snps,rxpbl = <16>;

			starfive,syscon = <&aon_syscon 0xc 0x12>;

			status = "disabled";

		};



		gmac1: ethernet@16040000 {

			compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";

			reg = <0x0 0x16040000 0x0 0x10000>;

			clocks = <&syscrg JH7110_SYSCLK_GMAC1_AXI>,

				 <&syscrg JH7110_SYSCLK_GMAC1_AHB>,

				 <&syscrg JH7110_SYSCLK_GMAC1_PTP>,

				 <&syscrg JH7110_SYSCLK_GMAC1_TX_INV>,

				 <&syscrg JH7110_SYSCLK_GMAC1_GTXC>;

			clock-names = "stmmaceth", "pclk", "ptp_ref",

				      "tx", "gtx";

			resets = <&syscrg JH7110_SYSRST_GMAC1_AXI>,

				 <&syscrg JH7110_SYSRST_GMAC1_AHB>;

			reset-names = "stmmaceth", "ahb";

			interrupts = <78>, <77>, <76>;

			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";

			rx-fifo-depth = <2048>;

			tx-fifo-depth = <2048>;

			snps,multicast-filter-bins = <64>;

			snps,perfect-filter-entries = <8>;

			snps,fixed-burst;

			snps,no-pbl-x8;

			snps,force_thresh_dma_mode;

			snps,axi-config = <&stmmac_axi_setup>;

			snps,tso;

			snps,en-tx-lpi-clockgating;

			snps,txpbl = <16>;

			snps,rxpbl = <16>;

			starfive,syscon = <&sys_syscon 0x90 0x2>;

			status = "disabled";

		};



		aoncrg: clock-controller@17000000 {

			compatible = "starfive,jh7110-aoncrg";

			reg = <0x0 0x17000000 0x0 0x10000>;