Commit 1f75e2ff authored by Yazen Ghannam's avatar Yazen Ghannam Committed by PvsNarasimha
Browse files

x86/amd_nb, EDAC/amd64: Move DF Indirect Read to AMD64 EDAC 

mainline inclusion
from mainline-v5.17-rc1
commit b3218ae4
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/IAU6ZD

Reference: https://github.com/torvalds/linux/commit/b3218ae47771f943b3e222f35fc46afacba39929



--------------------------------

commit b3218ae4 upstream

df_indirect_read() is used only for address translation. Move it to EDAC
along with the translation code.

Signed-off-by: default avatarYazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20211028175728.121452-3-yazen.ghannam@amd.com


Signed-off-by: default avatarPvsNarasimha <PVS.NarasimhaRao@amd.com>
parent f531b91d

arch/x86/include/asm/amd_nb.h

+0 −1
Original line number Diff line number Diff line
@@ -24,7 +24,6 @@ extern int amd_set_subcaches(int, unsigned long); 


extern int amd_smn_read(u16 node, u32 address, u32 *value);

extern int amd_smn_write(u16 node, u32 address, u32 value);

extern int amd_df_indirect_read(u16 node, u8 func, u16 reg, u8 instance_id, u32 *lo);



struct amd_l3_cache {

	unsigned indices;

arch/x86/kernel/amd_nb.c

+1 −48
Original line number Diff line number Diff line
@@ -39,7 +39,7 @@ 
#define PCI_DEVICE_ID_HYGON_18H_M10H_DF_F4 0x14d4

#define PCI_DEVICE_ID_HYGON_18H_M06H_DF_F5 0x14b5



/* Protect the PCI config register pairs used for SMN and DF indirect access. */

/* Protect the PCI config register pairs used for SMN. */

static DEFINE_MUTEX(smn_mutex);



static u32 *flush_words;
@@ -205,53 +205,6 @@ int amd_smn_write(u16 node, u32 address, u32 value) 
}

EXPORT_SYMBOL_GPL(amd_smn_write);



/*

 * Data Fabric Indirect Access uses FICAA/FICAD.

 *

 * Fabric Indirect Configuration Access Address (FICAA): Constructed based

 * on the device's Instance Id and the PCI function and register offset of

 * the desired register.

 *

 * Fabric Indirect Configuration Access Data (FICAD): There are FICAD LO

 * and FICAD HI registers but so far we only need the LO register.

 */

int amd_df_indirect_read(u16 node, u8 func, u16 reg, u8 instance_id, u32 *lo)

{

	struct pci_dev *F4;

	u32 ficaa;

	int err = -ENODEV;



	if (node >= amd_northbridges.num)

		goto out;



	F4 = node_to_amd_nb(node)->link;

	if (!F4)

		goto out;



	ficaa  = 1;

	ficaa |= reg & 0x3FC;

	ficaa |= (func & 0x7) << 11;

	ficaa |= instance_id << 16;



	mutex_lock(&smn_mutex);



	err = pci_write_config_dword(F4, 0x5C, ficaa);

	if (err) {

		pr_warn("Error writing DF Indirect FICAA, FICAA=0x%x\n", ficaa);

		goto out_unlock;

	}



	err = pci_read_config_dword(F4, 0x98, lo);

	if (err)

		pr_warn("Error reading DF Indirect FICAD LO, FICAA=0x%x.\n", ficaa);



out_unlock:

	mutex_unlock(&smn_mutex);



out:

	return err;

}

EXPORT_SYMBOL_GPL(amd_df_indirect_read);



bool hygon_f18h_m4h(void)

{

drivers/edac/amd64_edac.c

+50 −0
Original line number Diff line number Diff line
@@ -735,6 +735,56 @@ static int sys_addr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr) 
	return csrow;

}



/* Protect the PCI config register pairs used for DF indirect access. */

static DEFINE_MUTEX(df_indirect_mutex);



/*

 * Data Fabric Indirect Access uses FICAA/FICAD.

 *

 * Fabric Indirect Configuration Access Address (FICAA): Constructed based

 * on the device's Instance Id and the PCI function and register offset of

 * the desired register.

 *

 * Fabric Indirect Configuration Access Data (FICAD): There are FICAD LO

 * and FICAD HI registers but so far we only need the LO register.

 */

static int amd_df_indirect_read(u16 node, u8 func, u16 reg, u8 instance_id, u32 *lo)

{

	struct pci_dev *F4;

	u32 ficaa;

	int err = -ENODEV;



	if (node >= amd_nb_num())

		goto out;



	F4 = node_to_amd_nb(node)->link;

	if (!F4)

		goto out;



	ficaa  = 1;

	ficaa |= reg & 0x3FC;

	ficaa |= (func & 0x7) << 11;

	ficaa |= instance_id << 16;



	mutex_lock(&df_indirect_mutex);



	err = pci_write_config_dword(F4, 0x5C, ficaa);

	if (err) {

		pr_warn("Error writing DF Indirect FICAA, FICAA=0x%x\n", ficaa);

		goto out_unlock;

	}



	err = pci_read_config_dword(F4, 0x98, lo);

	if (err)

		pr_warn("Error reading DF Indirect FICAD LO, FICAA=0x%x.\n", ficaa);



out_unlock:

	mutex_unlock(&df_indirect_mutex);



out:

	return err;

}



static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr)

{

	u64 dram_base_addr, dram_limit_addr, dram_hole_base;