Commit 1ca87e01 authored by David Matlack's avatar David Matlack Committed by Paolo Bonzini
Browse files

KVM: x86/mmu: Rename DEFAULT_SPTE_MMU_WRITEABLE to DEFAULT_SPTE_MMU_WRITABLE 



Both "writeable" and "writable" are valid, but we should be consistent
about which we use. DEFAULT_SPTE_MMU_WRITEABLE was the odd one out in
the SPTE code, so rename it to DEFAULT_SPTE_MMU_WRITABLE.

No functional change intended.

Signed-off-by: default avatarDavid Matlack <dmatlack@google.com>
Message-Id: <20220125230713.1700406-1-dmatlack@google.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 00610021

arch/x86/kvm/mmu/mmu.c

+1 −1
Original line number Diff line number Diff line
@@ -5844,7 +5844,7 @@ void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 
	 * will clear a separate software-only bit (MMU-writable) and skip the

	 * flush if-and-only-if this bit was already clear.

	 *

	 * See DEFAULT_SPTE_MMU_WRITEABLE for more details.

	 * See DEFAULT_SPTE_MMU_WRITABLE for more details.

	 */

	if (flush)

		kvm_arch_flush_remote_tlbs_memslot(kvm, memslot);

arch/x86/kvm/mmu/spte.c

+2 −2
Original line number Diff line number Diff line
@@ -361,8 +361,8 @@ void kvm_mmu_reset_all_pte_masks(void) 
	shadow_acc_track_mask	= 0;

	shadow_me_mask		= sme_me_mask;



	shadow_host_writable_mask = DEFAULT_SPTE_HOST_WRITEABLE;

	shadow_mmu_writable_mask  = DEFAULT_SPTE_MMU_WRITEABLE;

	shadow_host_writable_mask = DEFAULT_SPTE_HOST_WRITABLE;

	shadow_mmu_writable_mask  = DEFAULT_SPTE_MMU_WRITABLE;



	/*

	 * Set a reserved PA bit in MMIO SPTEs to generate page faults with

arch/x86/kvm/mmu/spte.h

+4 −4
Original line number Diff line number Diff line
@@ -75,7 +75,7 @@ static_assert(SPTE_TDP_AD_ENABLED_MASK == 0); 
static_assert(!(SPTE_TDP_AD_MASK & SHADOW_ACC_TRACK_SAVED_MASK));



/*

 * *_SPTE_HOST_WRITEABLE (aka Host-writable) indicates whether the host permits

 * *_SPTE_HOST_WRITABLE (aka Host-writable) indicates whether the host permits

 * writes to the guest page mapped by the SPTE. This bit is cleared on SPTEs

 * that map guest pages in read-only memslots and read-only VMAs.

 *
@@ -83,7 +83,7 @@ static_assert(!(SPTE_TDP_AD_MASK & SHADOW_ACC_TRACK_SAVED_MASK)); 
 *  - If Host-writable is clear, PT_WRITABLE_MASK must be clear.

 *

 *

 * *_SPTE_MMU_WRITEABLE (aka MMU-writable) indicates whether the shadow MMU

 * *_SPTE_MMU_WRITABLE (aka MMU-writable) indicates whether the shadow MMU

 * allows writes to the guest page mapped by the SPTE. This bit is cleared when

 * the guest page mapped by the SPTE contains a page table that is being

 * monitored for shadow paging. In this case the SPTE can only be made writable
@@ -100,8 +100,8 @@ static_assert(!(SPTE_TDP_AD_MASK & SHADOW_ACC_TRACK_SAVED_MASK)); 
 */



/* Bits 9 and 10 are ignored by all non-EPT PTEs. */

#define DEFAULT_SPTE_HOST_WRITEABLE	BIT_ULL(9)

#define DEFAULT_SPTE_MMU_WRITEABLE	BIT_ULL(10)

#define DEFAULT_SPTE_HOST_WRITABLE	BIT_ULL(9)

#define DEFAULT_SPTE_MMU_WRITABLE	BIT_ULL(10)



/*

 * Low ignored bits are at a premium for EPT, use high ignored bits, taking care