KVM: x86/mmu: Coalesce TLB flushes when zapping collapsible SPTEs

mainline inclusion
from mainline-v5.13-rc1
commit 142ccde1
category: feature
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I7S3VQ
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=142ccde1f7b1b0c621c299cbcc8feb6353f7cc92



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Gather pending TLB flushes across both the legacy and TDP MMUs when
zapping collapsible SPTEs to avoid multiple flushes if both the legacy
MMU (for nested guests) and TDP MMU have mappings for the memslot.

Note, this also optimizes the TDP MMU to flush only the relevant range
when running as L1 with Hyper-V enlightenments.

Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20210326021957.1424875-4-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

conflict:
	arch/x86/kvm/mmu/tdp_mmu.h

Signed-off-by: Yu Zhang <yu.c.zhang@linux.intel.com>