Unverified Commit 1b5964b2 authored by Palmer Dabbelt's avatar Palmer Dabbelt
Browse files

Merge patch series "Fix dt-validate issues on qemu dtbdumps due to dt-bindings" 

Conor Dooley <mail@conchuod.ie> says:

From: Conor Dooley <conor.dooley@microchip.com>

The device trees produced automatically for the virt and spike machines
fail dt-validate on several grounds. Some of these need to be fixed in
the linux kernel's dt-bindings, but others are caused by bugs in QEMU.

Patches been sent that fix the QEMU issues [0], but a couple of them
need to be fixed in the kernel's dt-bindings. The first patches add
compatibles for "riscv,{clint,plic}0" which are present in drivers and
the auto generated QEMU dtbs.

Thanks to Rob Herring for reporting these issues [1],
Conor.

To reproduce the errors:
./build/qemu-system-riscv64 -nographic -machine virt,dumpdtb=qemu.dtb
dt-validate -p /path/to/linux/kernel/Documentation/devicetree/bindings/processed-schema.json qemu.dtb
(The processed schema needs to be generated first)

0 - https://lore.kernel.org/linux-riscv/20220810184612.157317-1-mail@conchuod.ie/
1 - https://lore.kernel.org/linux-riscv/20220803170552.GA2250266-robh@kernel.org/

* fix-dt-validate:
  dt-bindings: riscv: add new riscv,isa strings for emulators
  dt-bindings: interrupt-controller: sifive,plic: add legacy riscv compatible
  dt-bindings: timer: sifive,clint: add legacy riscv compatible

Link: https://lore.kernel.org/r/20220823183319.3314940-1-mail@conchuod.ie


[Palmer: some cover letter pruning, and dropped #4 as suggested.]
Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parents 90e0d94d 299824e6

Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml

+5 −0
Original line number Diff line number Diff line
@@ -66,6 +66,11 @@ properties: 
          - enum:

              - allwinner,sun20i-d1-plic

          - const: thead,c900-plic

      - items:

          - const: sifive,plic-1.0.0

          - const: riscv,plic0

        deprecated: true

        description: For the QEMU virt machine only



  reg:

    maxItems: 1

Documentation/devicetree/bindings/riscv/cpus.yaml

+2 −3
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ title: RISC-V bindings for 'cpus' DT nodes 
maintainers:

  - Paul Walmsley <paul.walmsley@sifive.com>

  - Palmer Dabbelt <palmer@sifive.com>

  - Conor Dooley <conor@kernel.org>



description: |

  This document uses some terminology common to the RISC-V community
@@ -79,9 +80,7 @@ properties: 
      insensitive, letters in the riscv,isa string must be all

      lowercase to simplify parsing.

    $ref: "/schemas/types.yaml#/definitions/string"

    enum:

      - rv64imac

      - rv64imafdc

    pattern: ^rv(?:64|32)imaf?d?q?c?b?v?k?h?(?:_[hsxz](?:[a-z])+)*$



  # RISC-V requires 'timebase-frequency' in /cpus, so disallow it here

  timebase-frequency: false

Documentation/devicetree/bindings/timer/sifive,clint.yaml

+12 −6
Original line number Diff line number Diff line
@@ -22,12 +22,18 @@ description: 


properties:

  compatible:

    items:

    oneOf:

      - items:

          - enum:

              - sifive,fu540-c000-clint

              - starfive,jh7100-clint

              - canaan,k210-clint

          - const: sifive,clint0

      - items:

          - const: sifive,clint0

          - const: riscv,clint0

        deprecated: true

        description: For the QEMU virt machine only



    description:

      Should be "<vendor>,<chip>-clint" and "sifive,clint<version>".