Merge branch '20230104093450.3150578-2-abel.vesa@linaro.org' into arm64-for-6.3

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/qcom,sm8550-tcsr.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm TCSR Clock Controller on SM8550

maintainers:

  - Bjorn Andersson <andersson@kernel.org>

description: |

  Qualcomm TCSR clock control module provides the clocks, resets and

  power domains on SM8550

  See also:: include/dt-bindings/clock/qcom,sm8550-tcsr.h

properties:

  compatible:

    items:

      - const: qcom,sm8550-tcsr

      - const: syscon

  clocks:

    items:

      - description: TCXO pad clock

  reg:

    maxItems: 1

  '#clock-cells':

    const: 1

  '#reset-cells':

    const: 1

required:

  - compatible

  - clocks

additionalProperties: false

examples:

  - |

    #include <dt-bindings/clock/qcom,rpmh.h>

    clock-controller@1fc0000 {

      compatible = "qcom,sm8550-tcsr", "syscon";

      reg = <0x1fc0000 0x30000>;

      clocks = <&rpmhcc RPMH_CXO_CLK>;

      #clock-cells = <1>;

      #reset-cells = <1>;

    };

...

/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */

/*

 * Copyright (c) 2022, The Linux Foundation. All rights reserved.

 * Copyright (c) 2022, Linaro Limited

 */

#ifndef _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H

#define _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H

/* TCSR CC clocks */

#define TCSR_PCIE_0_CLKREF_EN					0

#define TCSR_PCIE_1_CLKREF_EN					1

#define TCSR_UFS_CLKREF_EN					2

#define TCSR_UFS_PAD_CLKREF_EN					3

#define TCSR_USB2_CLKREF_EN					4

#define TCSR_USB3_CLKREF_EN					5

#endif