Commit 15f09a99 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'du-next-20211206' of git://linuxtv.org/pinchartl/media into drm-next 



R-Car DU updates:

- DSI output support
- Misc fixes

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://patchwork.freedesktop.org/patch/msgid/Ya4/MCeuNf601tL4@pendragon.ideasonboard.com
parents f8eb96b4 15535831

Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml

0 → 100644
+118 −0
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/display/bridge/renesas,dsi-csi2-tx.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Renesas R-Car MIPI DSI/CSI-2 Encoder



maintainers:

  - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>



description: |

  This binding describes the MIPI DSI/CSI-2 encoder embedded in the Renesas

  R-Car V3U SoC. The encoder can operate in either DSI or CSI-2 mode, with up

  to four data lanes.



properties:

  compatible:

    enum:

      - renesas,r8a779a0-dsi-csi2-tx    # for V3U



  reg:

    maxItems: 1



  clocks:

    items:

      - description: Functional clock

      - description: DSI (and CSI-2) functional clock

      - description: PLL reference clock



  clock-names:

    items:

      - const: fck

      - const: dsi

      - const: pll



  power-domains:

    maxItems: 1



  resets:

    maxItems: 1



  ports:

    $ref: /schemas/graph.yaml#/properties/ports



    properties:

      port@0:

        $ref: /schemas/graph.yaml#/properties/port

        description: Parallel input port



      port@1:

        $ref: /schemas/graph.yaml#/$defs/port-base

        unevaluatedProperties: false

        description: DSI/CSI-2 output port



        properties:

          endpoint:

            $ref: /schemas/media/video-interfaces.yaml#

            unevaluatedProperties: false



            properties:

              data-lanes:

                minItems: 1

                maxItems: 4



            required:

              - data-lanes



    required:

      - port@0

      - port@1



required:

  - compatible

  - reg

  - clocks

  - power-domains

  - resets

  - ports



additionalProperties: false



examples:

  - |

    #include <dt-bindings/clock/r8a779a0-cpg-mssr.h>

    #include <dt-bindings/power/r8a779a0-sysc.h>



    dsi0: dsi-encoder@fed80000 {

        compatible = "renesas,r8a779a0-dsi-csi2-tx";

        reg = <0xfed80000 0x10000>;

        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;

        clocks = <&cpg CPG_MOD 415>,

                 <&cpg CPG_CORE R8A779A0_CLK_DSI>,

                 <&cpg CPG_CORE R8A779A0_CLK_CP>;

        clock-names = "fck", "dsi", "pll";

        resets = <&cpg 415>;



        ports {

            #address-cells = <1>;

            #size-cells = <0>;



            port@0 {

                reg = <0>;

                dsi0_in: endpoint {

                    remote-endpoint = <&du_out_dsi0>;

                };

            };



            port@1 {

                reg = <1>;

                dsi0_out: endpoint {

                    data-lanes = <1 2>;

                    remote-endpoint = <&sn65dsi86_in>;

                };

            };

        };

    };

...

MAINTAINERS

+1 −0
Original line number Diff line number Diff line
@@ -6414,6 +6414,7 @@ L: dri-devel@lists.freedesktop.org 
L:	linux-renesas-soc@vger.kernel.org

S:	Supported

T:	git git://linuxtv.org/pinchartl/media drm/du/next

F:	Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml

F:	Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml

F:	Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml

F:	Documentation/devicetree/bindings/display/renesas,du.yaml

drivers/gpu/drm/rcar-du/Kconfig

+22 −8
Original line number Diff line number Diff line
@@ -4,8 +4,6 @@ config DRM_RCAR_DU 
	depends on DRM && OF

	depends on ARM || ARM64

	depends on ARCH_RENESAS || COMPILE_TEST

	imply DRM_RCAR_CMM

	imply DRM_RCAR_LVDS

	select DRM_KMS_HELPER

	select DRM_KMS_CMA_HELPER

	select DRM_GEM_CMA_HELPER
@@ -14,13 +12,17 @@ config DRM_RCAR_DU 
	  Choose this option if you have an R-Car chipset.

	  If M is selected the module will be called rcar-du-drm.



config DRM_RCAR_CMM

	tristate "R-Car DU Color Management Module (CMM) Support"

	depends on DRM && OF

config DRM_RCAR_USE_CMM

	bool "R-Car DU Color Management Module (CMM) Support"

	depends on DRM_RCAR_DU

	default DRM_RCAR_DU

	help

	  Enable support for R-Car Color Management Module (CMM).



config DRM_RCAR_CMM

	def_tristate DRM_RCAR_DU

	depends on DRM_RCAR_USE_CMM



config DRM_RCAR_DW_HDMI

	tristate "R-Car Gen3 and RZ/G2 DU HDMI Encoder Support"

	depends on DRM && OF
@@ -28,15 +30,27 @@ config DRM_RCAR_DW_HDMI 
	help

	  Enable support for R-Car Gen3 or RZ/G2 internal HDMI encoder.



config DRM_RCAR_USE_LVDS

	bool "R-Car DU LVDS Encoder Support"

	depends on DRM_BRIDGE && OF

	default DRM_RCAR_DU

	help

	  Enable support for the R-Car Display Unit embedded LVDS encoders.



config DRM_RCAR_LVDS

	tristate "R-Car DU LVDS Encoder Support"

	depends on DRM && DRM_BRIDGE && OF

	def_tristate DRM_RCAR_DU

	depends on DRM_RCAR_USE_LVDS

	select DRM_KMS_HELPER

	select DRM_PANEL

	select OF_FLATTREE

	select OF_OVERLAY



config DRM_RCAR_MIPI_DSI

	tristate "R-Car DU MIPI DSI Encoder Support"

	depends on DRM && DRM_BRIDGE && OF

	select DRM_MIPI_DSI

	help

	  Enable support for the R-Car Display Unit embedded LVDS encoders.

	  Enable support for the R-Car Display Unit embedded MIPI DSI encoders.



config DRM_RCAR_VSP

	bool "R-Car DU VSP Compositor Support" if ARM

drivers/gpu/drm/rcar-du/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@ obj-$(CONFIG_DRM_RCAR_CMM) += rcar_cmm.o 
obj-$(CONFIG_DRM_RCAR_DU)		+= rcar-du-drm.o

obj-$(CONFIG_DRM_RCAR_DW_HDMI)		+= rcar_dw_hdmi.o

obj-$(CONFIG_DRM_RCAR_LVDS)		+= rcar_lvds.o

obj-$(CONFIG_DRM_RCAR_MIPI_DSI)		+= rcar_mipi_dsi.o



# 'remote-endpoint' is fixed up at run-time

DTC_FLAGS_rcar_du_of_lvds_r8a7790 += -Wno-graph_endpoint

drivers/gpu/drm/rcar-du/rcar_du_crtc.c

+22 −9
Original line number Diff line number Diff line
@@ -215,6 +215,7 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc) 
	const struct drm_display_mode *mode = &rcrtc->crtc.state->adjusted_mode;

	struct rcar_du_device *rcdu = rcrtc->dev;

	unsigned long mode_clock = mode->clock * 1000;

	unsigned int hdse_offset;

	u32 dsmr;

	u32 escr;
@@ -261,12 +262,13 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc) 
		rcar_du_group_write(rcrtc->group, DPLLCR, dpllcr);



		escr = ESCR_DCLKSEL_DCLKIN | div;

	} else if (rcdu->info->lvds_clk_mask & BIT(rcrtc->index)) {

	} else if (rcdu->info->lvds_clk_mask & BIT(rcrtc->index) ||

		   rcdu->info->dsi_clk_mask & BIT(rcrtc->index)) {

		/*

		 * Use the LVDS PLL output as the dot clock when outputting to

		 * the LVDS encoder on an SoC that supports this clock routing

		 * option. We use the clock directly in that case, without any

		 * additional divider.

		 * Use the external LVDS or DSI PLL output as the dot clock when

		 * outputting to the LVDS or DSI encoder on an SoC that supports

		 * this clock routing option. We use the clock directly in that

		 * case, without any additional divider.

		 */

		escr = ESCR_DCLKSEL_DCLKIN;

	} else {
@@ -298,10 +300,15 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc) 
	     | DSMR_DIPM_DISP | DSMR_CSPM;

	rcar_du_crtc_write(rcrtc, DSMR, dsmr);



	hdse_offset = 19;

	if (rcrtc->group->cmms_mask & BIT(rcrtc->index % 2))

		hdse_offset += 25;



	/* Display timings */

	rcar_du_crtc_write(rcrtc, HDSR, mode->htotal - mode->hsync_start - 19);

	rcar_du_crtc_write(rcrtc, HDSR, mode->htotal - mode->hsync_start -

					hdse_offset);

	rcar_du_crtc_write(rcrtc, HDER, mode->htotal - mode->hsync_start +

					mode->hdisplay - 19);

					mode->hdisplay - hdse_offset);

	rcar_du_crtc_write(rcrtc, HSWR, mode->hsync_end -

					mode->hsync_start - 1);

	rcar_du_crtc_write(rcrtc, HCR,  mode->htotal - 1);
@@ -836,6 +843,7 @@ rcar_du_crtc_mode_valid(struct drm_crtc *crtc, 
	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);

	struct rcar_du_device *rcdu = rcrtc->dev;

	bool interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;

	unsigned int min_sync_porch;

	unsigned int vbp;



	if (interlaced && !rcar_du_has(rcdu, RCAR_DU_FEATURE_INTERLACED))
@@ -843,9 +851,14 @@ rcar_du_crtc_mode_valid(struct drm_crtc *crtc, 


	/*

	 * The hardware requires a minimum combined horizontal sync and back

	 * porch of 20 pixels and a minimum vertical back porch of 3 lines.

	 * porch of 20 pixels (when CMM isn't used) or 45 pixels (when CMM is

	 * used), and a minimum vertical back porch of 3 lines.

	 */

	if (mode->htotal - mode->hsync_start < 20)

	min_sync_porch = 20;

	if (rcrtc->group->cmms_mask & BIT(rcrtc->index % 2))

		min_sync_porch += 25;



	if (mode->htotal - mode->hsync_start < min_sync_porch)

		return MODE_HBLANK_NARROW;



	vbp = (mode->vtotal - mode->vsync_end) / (interlaced ? 2 : 1);