Commit f8eb96b4 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-next-5.17-2021-12-02' of... 

Merge tag 'amd-drm-next-5.17-2021-12-02' of https://gitlab.freedesktop.org/agd5f/linux into drm-next

amd-drm-next-5.17-2021-12-02:

amdgpu:
- Use generic drm fb helpers
- PSR fixes
- Rework DCN3.1 clkmgr
- DPCD 1.3 fixes
- Misc display fixes can cleanups
- Clock query fixes for APUs
- LTTPR fixes
- DSC fixes
- Misc PM fixes
- RAS fixes
- OLED backlight fix
- SRIOV fixes
- Add STB (Smart Trace Buffer) for supported dGPUs
- IH rework
- Enable seamless boot for DCN3.01

amdkfd:
- Rework more stuff around IP discovery enumeration
- Further clean up of interfaces with amdgpu
- SVM fixes

radeon:
- Indentation fixes

UAPI:
- Add a new KFD header that defines some of the sysfs bitfields and enums that userspace has been using for a while
  The corresponding bit-fields and enums in user mode are defined in
  https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/blob/master/include/hsakmttypes.h



Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

# Conflicts:
#	drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211202191643.5970-1-alexander.deucher@amd.com
parents c8a04cbe 70897848

MAINTAINERS

+1 −0
Original line number Diff line number Diff line
@@ -966,6 +966,7 @@ F: drivers/gpu/drm/amd/include/kgd_kfd_interface.h 
F:	drivers/gpu/drm/amd/include/v9_structs.h

F:	drivers/gpu/drm/amd/include/vi_structs.h

F:	include/uapi/linux/kfd_ioctl.h

F:	include/uapi/linux/kfd_sysfs.h









AMD SPI DRIVER









M:	Sanjay R Mehta <sanju.mehta@amd.com>
































drivers/gpu/drm/amd/amdgpu/Makefile



+1
−1






























Original line number
Diff line number
Diff line







@@ -45,7 +45,7 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \







	amdgpu_atombios.o atombios_crtc.o amdgpu_connectors.o \









	atom.o amdgpu_fence.o amdgpu_ttm.o amdgpu_object.o amdgpu_gart.o \









	amdgpu_encoders.o amdgpu_display.o amdgpu_i2c.o \









	amdgpu_fb.o amdgpu_gem.o amdgpu_ring.o \









	amdgpu_gem.o amdgpu_ring.o \









	amdgpu_cs.o amdgpu_bios.o amdgpu_benchmark.o amdgpu_test.o \









	atombios_dp.o amdgpu_afmt.o amdgpu_trace_points.o \









	atombios_encoders.o amdgpu_sa.o atombios_i2c.o \
































drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c



+36
−98






























Original line number
Diff line number
Diff line







@@ -72,7 +72,7 @@ void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev)







	if (!kfd_initialized)









		return;



















	adev->kfd.dev = kgd2kfd_probe((struct kgd_dev *)adev, vf);









	adev->kfd.dev = kgd2kfd_probe(adev, vf);



















	if (adev->kfd.dev)









		amdgpu_amdkfd_total_mem_size += adev->gmc.real_vram_size;








@@ -233,19 +233,16 @@ int amdgpu_amdkfd_post_reset(struct amdgpu_device *adev)







	return r;









}



















void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd)









void amdgpu_amdkfd_gpu_reset(struct amdgpu_device *adev)









{









	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;



















	if (amdgpu_device_should_recover_gpu(adev))









		amdgpu_device_gpu_recover(adev, NULL);









}



















int amdgpu_amdkfd_alloc_gtt_mem(struct kgd_dev *kgd, size_t size,









int amdgpu_amdkfd_alloc_gtt_mem(struct amdgpu_device *adev, size_t size,









				void **mem_obj, uint64_t *gpu_addr,









				void **cpu_ptr, bool cp_mqd_gfx9)









{









	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;









	struct amdgpu_bo *bo = NULL;









	struct amdgpu_bo_param bp;









	int r;








@@ -314,7 +311,7 @@ int amdgpu_amdkfd_alloc_gtt_mem(struct kgd_dev *kgd, size_t size,







	return r;









}



















void amdgpu_amdkfd_free_gtt_mem(struct kgd_dev *kgd, void *mem_obj)









void amdgpu_amdkfd_free_gtt_mem(struct amdgpu_device *adev, void *mem_obj)









{









	struct amdgpu_bo *bo = (struct amdgpu_bo *) mem_obj;


















@@ -325,10 +322,9 @@ void amdgpu_amdkfd_free_gtt_mem(struct kgd_dev *kgd, void *mem_obj)







	amdgpu_bo_unref(&(bo));









}



















int amdgpu_amdkfd_alloc_gws(struct kgd_dev *kgd, size_t size,









int amdgpu_amdkfd_alloc_gws(struct amdgpu_device *adev, size_t size,









				void **mem_obj)









{









	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;









	struct amdgpu_bo *bo = NULL;









	struct amdgpu_bo_user *ubo;









	struct amdgpu_bo_param bp;








@@ -355,18 +351,16 @@ int amdgpu_amdkfd_alloc_gws(struct kgd_dev *kgd, size_t size,







	return 0;









}



















void amdgpu_amdkfd_free_gws(struct kgd_dev *kgd, void *mem_obj)









void amdgpu_amdkfd_free_gws(struct amdgpu_device *adev, void *mem_obj)









{









	struct amdgpu_bo *bo = (struct amdgpu_bo *)mem_obj;



















	amdgpu_bo_unref(&bo);









}



















uint32_t amdgpu_amdkfd_get_fw_version(struct kgd_dev *kgd,









uint32_t amdgpu_amdkfd_get_fw_version(struct amdgpu_device *adev,









				      enum kgd_engine_type type)









{









	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;



















	switch (type) {









	case KGD_ENGINE_PFP:









		return adev->gfx.pfp_fw_version;








@@ -399,11 +393,9 @@ uint32_t amdgpu_amdkfd_get_fw_version(struct kgd_dev *kgd,







	return 0;









}



















void amdgpu_amdkfd_get_local_mem_info(struct kgd_dev *kgd,









void amdgpu_amdkfd_get_local_mem_info(struct amdgpu_device *adev,









				      struct kfd_local_mem_info *mem_info)









{









	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;



















	memset(mem_info, 0, sizeof(*mem_info));



















	mem_info->local_mem_size_public = adev->gmc.visible_vram_size;








@@ -428,19 +420,15 @@ void amdgpu_amdkfd_get_local_mem_info(struct kgd_dev *kgd,







		mem_info->mem_clk_max = 100;









}



















uint64_t amdgpu_amdkfd_get_gpu_clock_counter(struct kgd_dev *kgd)









uint64_t amdgpu_amdkfd_get_gpu_clock_counter(struct amdgpu_device *adev)









{









	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;



















	if (adev->gfx.funcs->get_gpu_clock_counter)









		return adev->gfx.funcs->get_gpu_clock_counter(adev);









	return 0;









}



















uint32_t amdgpu_amdkfd_get_max_engine_clock_in_mhz(struct kgd_dev *kgd)









uint32_t amdgpu_amdkfd_get_max_engine_clock_in_mhz(struct amdgpu_device *adev)









{









	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;



















	/* the sclk is in quantas of 10kHz */









	if (amdgpu_sriov_vf(adev))









		return adev->clock.default_sclk / 100;








@@ -450,9 +438,8 @@ uint32_t amdgpu_amdkfd_get_max_engine_clock_in_mhz(struct kgd_dev *kgd)







		return 100;









}



















void amdgpu_amdkfd_get_cu_info(struct kgd_dev *kgd, struct kfd_cu_info *cu_info)









void amdgpu_amdkfd_get_cu_info(struct amdgpu_device *adev, struct kfd_cu_info *cu_info)









{









	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;









	struct amdgpu_cu_info acu_info = adev->gfx.cu_info;



















	memset(cu_info, 0, sizeof(*cu_info));








@@ -473,13 +460,12 @@ void amdgpu_amdkfd_get_cu_info(struct kgd_dev *kgd, struct kfd_cu_info *cu_info)







	cu_info->lds_size = acu_info.lds_size;









}



















int amdgpu_amdkfd_get_dmabuf_info(struct kgd_dev *kgd, int dma_buf_fd,









				  struct kgd_dev **dma_buf_kgd,









int amdgpu_amdkfd_get_dmabuf_info(struct amdgpu_device *adev, int dma_buf_fd,









				  struct amdgpu_device **dmabuf_adev,









				  uint64_t *bo_size, void *metadata_buffer,









				  size_t buffer_size, uint32_t *metadata_size,









				  uint32_t *flags)









{









	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;









	struct dma_buf *dma_buf;









	struct drm_gem_object *obj;









	struct amdgpu_bo *bo;








@@ -507,8 +493,8 @@ int amdgpu_amdkfd_get_dmabuf_info(struct kgd_dev *kgd, int dma_buf_fd,







		goto out_put;



















	r = 0;









	if (dma_buf_kgd)









		*dma_buf_kgd = (struct kgd_dev *)adev;









	if (dmabuf_adev)









		*dmabuf_adev = adev;









	if (bo_size)









		*bo_size = amdgpu_bo_size(bo);









	if (metadata_buffer)








@@ -528,32 +514,18 @@ int amdgpu_amdkfd_get_dmabuf_info(struct kgd_dev *kgd, int dma_buf_fd,







	return r;









}



















uint64_t amdgpu_amdkfd_get_vram_usage(struct kgd_dev *kgd)









uint64_t amdgpu_amdkfd_get_vram_usage(struct amdgpu_device *adev)









{









	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;









	struct ttm_resource_manager *vram_man = ttm_manager_type(&adev->mman.bdev, TTM_PL_VRAM);



















	return amdgpu_vram_mgr_usage(vram_man);









}



















uint64_t amdgpu_amdkfd_get_hive_id(struct kgd_dev *kgd)









{









	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;



















	return adev->gmc.xgmi.hive_id;









}



















uint64_t amdgpu_amdkfd_get_unique_id(struct kgd_dev *kgd)









{









	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;



















	return adev->unique_id;









}



















uint8_t amdgpu_amdkfd_get_xgmi_hops_count(struct kgd_dev *dst, struct kgd_dev *src)









uint8_t amdgpu_amdkfd_get_xgmi_hops_count(struct amdgpu_device *dst,









					  struct amdgpu_device *src)









{









	struct amdgpu_device *peer_adev = (struct amdgpu_device *)src;









	struct amdgpu_device *adev = (struct amdgpu_device *)dst;









	struct amdgpu_device *peer_adev = src;









	struct amdgpu_device *adev = dst;









	int ret = amdgpu_xgmi_get_hops_count(adev, peer_adev);



















	if (ret < 0) {








@@ -565,16 +537,18 @@ uint8_t amdgpu_amdkfd_get_xgmi_hops_count(struct kgd_dev *dst, struct kgd_dev *s







	return  (uint8_t)ret;









}



















int amdgpu_amdkfd_get_xgmi_bandwidth_mbytes(struct kgd_dev *dst, struct kgd_dev *src, bool is_min)









int amdgpu_amdkfd_get_xgmi_bandwidth_mbytes(struct amdgpu_device *dst,









					    struct amdgpu_device *src,









					    bool is_min)









{









	struct amdgpu_device *adev = (struct amdgpu_device *)dst, *peer_adev;









	struct amdgpu_device *adev = dst, *peer_adev;









	int num_links;



















	if (adev->asic_type != CHIP_ALDEBARAN)









		return 0;



















	if (src)









		peer_adev = (struct amdgpu_device *)src;









		peer_adev = src;



















	/* num links returns 0 for indirect peers since indirect route is unknown. */









	num_links = is_min ? 1 : amdgpu_xgmi_get_num_links(adev, peer_adev);








@@ -589,9 +563,8 @@ int amdgpu_amdkfd_get_xgmi_bandwidth_mbytes(struct kgd_dev *dst, struct kgd_dev







	return (num_links * 16 * 25000)/BITS_PER_BYTE;









}



















int amdgpu_amdkfd_get_pcie_bandwidth_mbytes(struct kgd_dev *dev, bool is_min)









int amdgpu_amdkfd_get_pcie_bandwidth_mbytes(struct amdgpu_device *adev, bool is_min)









{









	struct amdgpu_device *adev = (struct amdgpu_device *)dev;









	int num_lanes_shift = (is_min ? ffs(adev->pm.pcie_mlw_mask) :









							fls(adev->pm.pcie_mlw_mask)) - 1;









	int gen_speed_shift = (is_min ? ffs(adev->pm.pcie_gen_mask &








@@ -647,39 +620,11 @@ int amdgpu_amdkfd_get_pcie_bandwidth_mbytes(struct kgd_dev *dev, bool is_min)







	return (num_lanes_factor * gen_speed_mbits_factor)/BITS_PER_BYTE;









}



















uint64_t amdgpu_amdkfd_get_mmio_remap_phys_addr(struct kgd_dev *kgd)









{









	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;



















	return adev->rmmio_remap.bus_addr;









}



















uint32_t amdgpu_amdkfd_get_num_gws(struct kgd_dev *kgd)









{









	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;



















	return adev->gds.gws_size;









}



















uint32_t amdgpu_amdkfd_get_asic_rev_id(struct kgd_dev *kgd)









{









	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;



















	return adev->rev_id;









}



















int amdgpu_amdkfd_get_noretry(struct kgd_dev *kgd)









{









	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;



















	return adev->gmc.noretry;









}



















int amdgpu_amdkfd_submit_ib(struct kgd_dev *kgd, enum kgd_engine_type engine,









int amdgpu_amdkfd_submit_ib(struct amdgpu_device *adev,









				enum kgd_engine_type engine,









				uint32_t vmid, uint64_t gpu_addr,









				uint32_t *ib_cmd, uint32_t ib_len)









{









	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;









	struct amdgpu_job *job;









	struct amdgpu_ib *ib;









	struct amdgpu_ring *ring;








@@ -730,10 +675,8 @@ int amdgpu_amdkfd_submit_ib(struct kgd_dev *kgd, enum kgd_engine_type engine,







	return ret;









}



















void amdgpu_amdkfd_set_compute_idle(struct kgd_dev *kgd, bool idle)









void amdgpu_amdkfd_set_compute_idle(struct amdgpu_device *adev, bool idle)









{









	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;



















	amdgpu_dpm_switch_power_profile(adev,









					PP_SMC_POWER_PROFILE_COMPUTE,









					!idle);








@@ -747,10 +690,9 @@ bool amdgpu_amdkfd_is_kfd_vmid(struct amdgpu_device *adev, u32 vmid)







	return false;









}



















int amdgpu_amdkfd_flush_gpu_tlb_vmid(struct kgd_dev *kgd, uint16_t vmid)









int amdgpu_amdkfd_flush_gpu_tlb_vmid(struct amdgpu_device *adev,









				     uint16_t vmid)









{









	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;



















	if (adev->family == AMDGPU_FAMILY_AI) {









		int i;


















@@ -763,10 +705,9 @@ int amdgpu_amdkfd_flush_gpu_tlb_vmid(struct kgd_dev *kgd, uint16_t vmid)







	return 0;









}



















int amdgpu_amdkfd_flush_gpu_tlb_pasid(struct kgd_dev *kgd, uint16_t pasid,









				      enum TLB_FLUSH_TYPE flush_type)









int amdgpu_amdkfd_flush_gpu_tlb_pasid(struct amdgpu_device *adev,









				      uint16_t pasid, enum TLB_FLUSH_TYPE flush_type)









{









	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;









	bool all_hub = false;



















	if (adev->family == AMDGPU_FAMILY_AI)








@@ -775,21 +716,18 @@ int amdgpu_amdkfd_flush_gpu_tlb_pasid(struct kgd_dev *kgd, uint16_t pasid,







	return amdgpu_gmc_flush_gpu_tlb_pasid(adev, pasid, flush_type, all_hub);









}



















bool amdgpu_amdkfd_have_atomics_support(struct kgd_dev *kgd)









bool amdgpu_amdkfd_have_atomics_support(struct amdgpu_device *adev)









{









	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;



















	return adev->have_atomics_support;









}



















void amdgpu_amdkfd_ras_poison_consumption_handler(struct kgd_dev *kgd)









void amdgpu_amdkfd_ras_poison_consumption_handler(struct amdgpu_device *adev)









{









	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;









	struct ras_err_data err_data = {0, 0, 0, NULL};



















	/* CPU MCA will handle page retirement if connected_to_cpu is 1 */









	if (!adev->gmc.xgmi.connected_to_cpu)









		amdgpu_umc_process_ras_data_cb(adev, &err_data, NULL);









	else









		amdgpu_amdkfd_gpu_reset(kgd);









		amdgpu_amdkfd_gpu_reset(adev);









}
























drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h



+53
−43






























Original line number
Diff line number
Diff line







@@ -144,14 +144,16 @@ void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev,







void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev);









void amdgpu_amdkfd_device_init(struct amdgpu_device *adev);









void amdgpu_amdkfd_device_fini_sw(struct amdgpu_device *adev);









int amdgpu_amdkfd_submit_ib(struct kgd_dev *kgd, enum kgd_engine_type engine,









int amdgpu_amdkfd_submit_ib(struct amdgpu_device *adev,









				enum kgd_engine_type engine,









				uint32_t vmid, uint64_t gpu_addr,









				uint32_t *ib_cmd, uint32_t ib_len);









void amdgpu_amdkfd_set_compute_idle(struct kgd_dev *kgd, bool idle);









bool amdgpu_amdkfd_have_atomics_support(struct kgd_dev *kgd);









int amdgpu_amdkfd_flush_gpu_tlb_vmid(struct kgd_dev *kgd, uint16_t vmid);









int amdgpu_amdkfd_flush_gpu_tlb_pasid(struct kgd_dev *kgd, uint16_t pasid,









				      enum TLB_FLUSH_TYPE flush_type);









void amdgpu_amdkfd_set_compute_idle(struct amdgpu_device *adev, bool idle);









bool amdgpu_amdkfd_have_atomics_support(struct amdgpu_device *adev);









int amdgpu_amdkfd_flush_gpu_tlb_vmid(struct amdgpu_device *adev,









				uint16_t vmid);









int amdgpu_amdkfd_flush_gpu_tlb_pasid(struct amdgpu_device *adev,









				uint16_t pasid, enum TLB_FLUSH_TYPE flush_type);



















bool amdgpu_amdkfd_is_kfd_vmid(struct amdgpu_device *adev, u32 vmid);


















@@ -159,7 +161,7 @@ int amdgpu_amdkfd_pre_reset(struct amdgpu_device *adev);

















int amdgpu_amdkfd_post_reset(struct amdgpu_device *adev);



















void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd);









void amdgpu_amdkfd_gpu_reset(struct amdgpu_device *adev);



















int amdgpu_queue_mask_bit_to_set_resource_bit(struct amdgpu_device *adev,









					int queue_bit);








@@ -198,37 +200,36 @@ int amdgpu_amdkfd_evict_userptr(struct kgd_mem *mem, struct mm_struct *mm)







}









#endif









/* Shared API */









int amdgpu_amdkfd_alloc_gtt_mem(struct kgd_dev *kgd, size_t size,









int amdgpu_amdkfd_alloc_gtt_mem(struct amdgpu_device *adev, size_t size,









				void **mem_obj, uint64_t *gpu_addr,









				void **cpu_ptr, bool mqd_gfx9);









void amdgpu_amdkfd_free_gtt_mem(struct kgd_dev *kgd, void *mem_obj);









int amdgpu_amdkfd_alloc_gws(struct kgd_dev *kgd, size_t size, void **mem_obj);









void amdgpu_amdkfd_free_gws(struct kgd_dev *kgd, void *mem_obj);









void amdgpu_amdkfd_free_gtt_mem(struct amdgpu_device *adev, void *mem_obj);









int amdgpu_amdkfd_alloc_gws(struct amdgpu_device *adev, size_t size,









				void **mem_obj);









void amdgpu_amdkfd_free_gws(struct amdgpu_device *adev, void *mem_obj);









int amdgpu_amdkfd_add_gws_to_process(void *info, void *gws, struct kgd_mem **mem);









int amdgpu_amdkfd_remove_gws_from_process(void *info, void *mem);









uint32_t amdgpu_amdkfd_get_fw_version(struct kgd_dev *kgd,









uint32_t amdgpu_amdkfd_get_fw_version(struct amdgpu_device *adev,









				      enum kgd_engine_type type);









void amdgpu_amdkfd_get_local_mem_info(struct kgd_dev *kgd,









void amdgpu_amdkfd_get_local_mem_info(struct amdgpu_device *adev,









				      struct kfd_local_mem_info *mem_info);









uint64_t amdgpu_amdkfd_get_gpu_clock_counter(struct kgd_dev *kgd);









uint64_t amdgpu_amdkfd_get_gpu_clock_counter(struct amdgpu_device *adev);



















uint32_t amdgpu_amdkfd_get_max_engine_clock_in_mhz(struct kgd_dev *kgd);









void amdgpu_amdkfd_get_cu_info(struct kgd_dev *kgd, struct kfd_cu_info *cu_info);









int amdgpu_amdkfd_get_dmabuf_info(struct kgd_dev *kgd, int dma_buf_fd,









				  struct kgd_dev **dmabuf_kgd,









uint32_t amdgpu_amdkfd_get_max_engine_clock_in_mhz(struct amdgpu_device *adev);









void amdgpu_amdkfd_get_cu_info(struct amdgpu_device *adev,









			       struct kfd_cu_info *cu_info);









int amdgpu_amdkfd_get_dmabuf_info(struct amdgpu_device *adev, int dma_buf_fd,









				  struct amdgpu_device **dmabuf_adev,









				  uint64_t *bo_size, void *metadata_buffer,









				  size_t buffer_size, uint32_t *metadata_size,









				  uint32_t *flags);









uint64_t amdgpu_amdkfd_get_vram_usage(struct kgd_dev *kgd);









uint64_t amdgpu_amdkfd_get_hive_id(struct kgd_dev *kgd);









uint64_t amdgpu_amdkfd_get_unique_id(struct kgd_dev *kgd);









uint64_t amdgpu_amdkfd_get_mmio_remap_phys_addr(struct kgd_dev *kgd);









uint32_t amdgpu_amdkfd_get_num_gws(struct kgd_dev *kgd);









uint32_t amdgpu_amdkfd_get_asic_rev_id(struct kgd_dev *kgd);









int amdgpu_amdkfd_get_noretry(struct kgd_dev *kgd);









uint8_t amdgpu_amdkfd_get_xgmi_hops_count(struct kgd_dev *dst, struct kgd_dev *src);









int amdgpu_amdkfd_get_xgmi_bandwidth_mbytes(struct kgd_dev *dst, struct kgd_dev *src, bool is_min);









int amdgpu_amdkfd_get_pcie_bandwidth_mbytes(struct kgd_dev *dev, bool is_min);









uint64_t amdgpu_amdkfd_get_vram_usage(struct amdgpu_device *adev);









uint8_t amdgpu_amdkfd_get_xgmi_hops_count(struct amdgpu_device *dst,









					  struct amdgpu_device *src);









int amdgpu_amdkfd_get_xgmi_bandwidth_mbytes(struct amdgpu_device *dst,









					    struct amdgpu_device *src,









					    bool is_min);









int amdgpu_amdkfd_get_pcie_bandwidth_mbytes(struct amdgpu_device *adev, bool is_min);



















/* Read user wptr from a specified user address space with page fault









 * disabled. The memory must be pinned and mapped to the hardware when








@@ -258,45 +259,54 @@ int amdgpu_amdkfd_get_pcie_bandwidth_mbytes(struct kgd_dev *dev, bool is_min);







	(&((struct amdgpu_fpriv *)					\









		((struct drm_file *)(drm_priv))->driver_priv)->vm)



















int amdgpu_amdkfd_gpuvm_acquire_process_vm(struct kgd_dev *kgd,









int amdgpu_amdkfd_gpuvm_acquire_process_vm(struct amdgpu_device *adev,









					struct file *filp, u32 pasid,









					void **process_info,









					struct dma_fence **ef);









void amdgpu_amdkfd_gpuvm_release_process_vm(struct kgd_dev *kgd, void *drm_priv);









void amdgpu_amdkfd_gpuvm_release_process_vm(struct amdgpu_device *adev,









					void *drm_priv);









uint64_t amdgpu_amdkfd_gpuvm_get_process_page_dir(void *drm_priv);









int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(









		struct kgd_dev *kgd, uint64_t va, uint64_t size,









		struct amdgpu_device *adev, uint64_t va, uint64_t size,









		void *drm_priv, struct kgd_mem **mem,









		uint64_t *offset, uint32_t flags);









int amdgpu_amdkfd_gpuvm_free_memory_of_gpu(









		struct kgd_dev *kgd, struct kgd_mem *mem, void *drm_priv,









		struct amdgpu_device *adev, struct kgd_mem *mem, void *drm_priv,









		uint64_t *size);









int amdgpu_amdkfd_gpuvm_map_memory_to_gpu(









		struct kgd_dev *kgd, struct kgd_mem *mem, void *drm_priv, bool *table_freed);









		struct amdgpu_device *adev, struct kgd_mem *mem, void *drm_priv,









		bool *table_freed);









int amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu(









		struct kgd_dev *kgd, struct kgd_mem *mem, void *drm_priv);









		struct amdgpu_device *adev, struct kgd_mem *mem, void *drm_priv);









int amdgpu_amdkfd_gpuvm_sync_memory(









		struct kgd_dev *kgd, struct kgd_mem *mem, bool intr);









int amdgpu_amdkfd_gpuvm_map_gtt_bo_to_kernel(struct kgd_dev *kgd,









		struct amdgpu_device *adev, struct kgd_mem *mem, bool intr);









int amdgpu_amdkfd_gpuvm_map_gtt_bo_to_kernel(struct amdgpu_device *adev,









		struct kgd_mem *mem, void **kptr, uint64_t *size);









void amdgpu_amdkfd_gpuvm_unmap_gtt_bo_from_kernel(struct kgd_dev *kgd, struct kgd_mem *mem);









void amdgpu_amdkfd_gpuvm_unmap_gtt_bo_from_kernel(struct amdgpu_device *adev,









		struct kgd_mem *mem);



















int amdgpu_amdkfd_gpuvm_restore_process_bos(void *process_info,









					    struct dma_fence **ef);









int amdgpu_amdkfd_gpuvm_get_vm_fault_info(struct kgd_dev *kgd,









int amdgpu_amdkfd_gpuvm_get_vm_fault_info(struct amdgpu_device *adev,









					      struct kfd_vm_fault_info *info);









int amdgpu_amdkfd_gpuvm_import_dmabuf(struct kgd_dev *kgd,









int amdgpu_amdkfd_gpuvm_import_dmabuf(struct amdgpu_device *adev,









				      struct dma_buf *dmabuf,









				      uint64_t va, void *drm_priv,









				      struct kgd_mem **mem, uint64_t *size,









				      uint64_t *mmap_offset);









int amdgpu_amdkfd_get_tile_config(struct kgd_dev *kgd,









int amdgpu_amdkfd_get_tile_config(struct amdgpu_device *adev,









				struct tile_config *config);









void amdgpu_amdkfd_ras_poison_consumption_handler(struct kgd_dev *kgd);









void amdgpu_amdkfd_ras_poison_consumption_handler(struct amdgpu_device *adev);









#if IS_ENABLED(CONFIG_HSA_AMD)









void amdgpu_amdkfd_gpuvm_init_mem_limits(void);









void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev,









				struct amdgpu_vm *vm);



















/**









 * @amdgpu_amdkfd_release_notify() - Notify KFD when GEM object is released









 *









 * Allows KFD to release its resources associated with the GEM object.









 */









void amdgpu_amdkfd_release_notify(struct amdgpu_bo *bo);









void amdgpu_amdkfd_reserve_system_mem(uint64_t size);









#else








@@ -324,7 +334,7 @@ int kgd2kfd_schedule_evict_and_restore_process(struct mm_struct *mm,







#if IS_ENABLED(CONFIG_HSA_AMD)









int kgd2kfd_init(void);









void kgd2kfd_exit(void);









struct kfd_dev *kgd2kfd_probe(struct kgd_dev *kgd, bool vf);









struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf);









bool kgd2kfd_device_init(struct kfd_dev *kfd,









			 struct drm_device *ddev,









			 const struct kgd2kfd_shared_resources *gpu_resources);








@@ -348,7 +358,7 @@ static inline void kgd2kfd_exit(void)







}



















static inline









struct kfd_dev *kgd2kfd_probe(struct kgd_dev *kgd, bool vf)









struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf)









{









	return NULL;









}
































drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c



+5
−13






























Original line number
Diff line number
Diff line







@@ -57,11 +57,6 @@







		(*dump)[i++][1] = RREG32(addr);		\









	} while (0)



















static inline struct amdgpu_device *get_amdgpu_device(struct kgd_dev *kgd)









{









	return (struct amdgpu_device *)kgd;









}



















static inline struct v9_sdma_mqd *get_sdma_mqd(void *mqd)









{









	return (struct v9_sdma_mqd *)mqd;








@@ -123,10 +118,9 @@ static uint32_t get_sdma_rlc_reg_offset(struct amdgpu_device *adev,







	return sdma_rlc_reg_offset;









}



















int kgd_arcturus_hqd_sdma_load(struct kgd_dev *kgd, void *mqd,









int kgd_arcturus_hqd_sdma_load(struct amdgpu_device *adev, void *mqd,









			     uint32_t __user *wptr, struct mm_struct *mm)









{









	struct amdgpu_device *adev = get_amdgpu_device(kgd);









	struct v9_sdma_mqd *m;









	uint32_t sdma_rlc_reg_offset;









	unsigned long end_jiffies;








@@ -193,11 +187,10 @@ int kgd_arcturus_hqd_sdma_load(struct kgd_dev *kgd, void *mqd,







	return 0;









}



















int kgd_arcturus_hqd_sdma_dump(struct kgd_dev *kgd,









int kgd_arcturus_hqd_sdma_dump(struct amdgpu_device *adev,









			     uint32_t engine_id, uint32_t queue_id,









			     uint32_t (**dump)[2], uint32_t *n_regs)









{









	struct amdgpu_device *adev = get_amdgpu_device(kgd);









	uint32_t sdma_rlc_reg_offset = get_sdma_rlc_reg_offset(adev,









			engine_id, queue_id);









	uint32_t i = 0, reg;








@@ -225,9 +218,9 @@ int kgd_arcturus_hqd_sdma_dump(struct kgd_dev *kgd,







	return 0;









}



















bool kgd_arcturus_hqd_sdma_is_occupied(struct kgd_dev *kgd, void *mqd)









bool kgd_arcturus_hqd_sdma_is_occupied(struct amdgpu_device *adev,









				void *mqd)









{









	struct amdgpu_device *adev = get_amdgpu_device(kgd);









	struct v9_sdma_mqd *m;









	uint32_t sdma_rlc_reg_offset;









	uint32_t sdma_rlc_rb_cntl;








@@ -244,10 +237,9 @@ bool kgd_arcturus_hqd_sdma_is_occupied(struct kgd_dev *kgd, void *mqd)







	return false;









}



















int kgd_arcturus_hqd_sdma_destroy(struct kgd_dev *kgd, void *mqd,









int kgd_arcturus_hqd_sdma_destroy(struct amdgpu_device *adev, void *mqd,









				unsigned int utimeout)









{









	struct amdgpu_device *adev = get_amdgpu_device(kgd);









	struct v9_sdma_mqd *m;









	uint32_t sdma_rlc_reg_offset;









	uint32_t temp;