Unverified Commit 15cd5d57 authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
Browse files

!13255 RDMA/hns: Fix the valid QP bank set to improve performance 

Merge Pull Request from: @ci-robot 
 
PR sync from: Chengchang Tang <tangchengchang@huawei.com>
https://mailweb.openeuler.org/hyperkitty/list/kernel@openeuler.org/message/5EILXXKRSTUENVM5IDMK72E4FILYKB6H/ 
 
https://gitee.com/openeuler/kernel/issues/IB2HJE 
 
Link:https://gitee.com/openeuler/kernel/pulls/13255

 

Reviewed-by: default avatarChengchang Tang <tangchengchang@huawei.com>
Signed-off-by: default avatarYang Yingliang <yangyingliang@huawei.com>
parents 3faacfa7 6335ae3f

drivers/infiniband/hw/hns/hns_roce_device.h

+2 −2
Original line number Diff line number Diff line
@@ -113,9 +113,9 @@ 
#define CQ_BANKID_MASK GENMASK(1, 0)



#define VALID_CQ_BANK_MASK_DEFAULT 0xF

#define VALID_CQ_BANK_MASK_LIMIT 0x5

#define VALID_CQ_BANK_MASK_LIMIT 0x9



#define QP_HARDEN_MASK GENMASK(1, 0)

#define VALID_EXT_SGE_QP_BANK_MASK_LIMIT 0x41



#define HNS_ROCE_MAX_CQ_COUNT 0xFFFF

#define HNS_ROCE_MAX_CQ_PERIOD 0xFFFF

drivers/infiniband/hw/hns/hns_roce_qp.c

+2 −1
Original line number Diff line number Diff line
@@ -244,7 +244,8 @@ static u8 select_qp_bankid(struct hns_roce_dev *hr_dev, 
			continue;



		if ((hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_LIMIT_BANK) &&

		    use_ext_sge(init_attr) && (QP_HARDEN_MASK & i))

		    use_ext_sge(init_attr) &&

		    !(VALID_EXT_SGE_QP_BANK_MASK_LIMIT & BIT(i)))

			continue;



		valid_qp_bank_mask |= BIT(i);