Commit 1176d15f authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-gt-next-2021-10-08' of... 

Merge tag 'drm-intel-gt-next-2021-10-08' of git://anongit.freedesktop.org/drm/drm-intel into drm-next

UAPI Changes:

- Add uAPI for using PXP protected objects

  Mesa changes: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8064

- Add PCI IDs and LMEM discovery/placement uAPI for DG1

  Mesa changes: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11584

- Disable engine bonding on Gen12+ except TGL, RKL and ADL-S

Cross-subsystem Changes:

- Merges 'tip/locking/wwmutex' branch (core kernel tip)
- "mei: pxp: export pavp client to me client bus"

Core Changes:

- Update ttm_move_memcpy for async use (Thomas)

Driver Changes:

- Enable GuC submission by default on DG1 (Matt B)
- Add PXP (Protected Xe Path) support for Gen12 integrated (Daniele,
  Sean, Anshuman)
  See "drm/i915/pxp: add PXP documentation" for details!
- Remove force_probe protection for ADL-S (Raviteja)
- Add base support for XeHP/XeHP SDV (Matt R, Stuart, Lucas)
- Handle DRI_PRIME=1 on Intel igfx + Intel dgfx hybrid graphics setup (Tvrtko)
- Use Transparent Hugepages when IOMMU is enabled (Tvrtko, Chris)
- Implement LMEM backup and restore for suspend / resume (Thomas)
- Report INSTDONE_GEOM values in error state for DG2 (Matt R)
- Add DG2-specific shadow register table (Matt R)
- Update Gen11/Gen12/XeHP shadow register tables (Matt R)
- Maintain backward-compatible nested batch behavior on TGL+ (Matt R)
- Add new LRI reg offsets for DG2 (Akeem)
- Initialize unused MOCS entries to device specific values (Ayaz)
- Track and use the correct UC MOCS index on Gen12 (Ayaz)
- Add separate MOCS table for Gen12 devices other than TGL/RKL (Ayaz)
- Simplify the locking and eliminate some RCU usage (Daniel)
- Add some flushing for the 64K GTT path (Matt A)
- Mark GPU wedging on driver unregister unrecoverable (Janusz)

- Major rework in the GuC codebase, simplify locking and add docs (Matt B)
- Add DG1 GuC/HuC firmwares (Daniele, Matt B)
- Remember to call i915_sw_fence_fini on guc_state.blocked (Matt A)
- Use "gt" forcewake domain name for error messages instead of "blitter" (Matt R)
- Drop now duplicate LMEM uAPI RFC kerneldoc section (Daniel)
- Fix early tracepoints for requests (Matt A)
- Use locked access to ctx->engines in set_priority (Daniel)
- Convert gen6/gen7/gen8 read operations to fwtable (Matt R)
- Drop gen11/gen12 specific mmio write handlers (Matt R)
- Drop gen11 specific mmio read handlers (Matt R)
- Use designated initializers for init/exit table (Kees)
- Fix syncmap memory leak (Matt B)
- Add pretty printing for buddy allocator state debug (Matt A)
- Fix potential error pointer dereference in pinned_context() (Dan)
- Remove IS_ACTIVE macro (Lucas)
- Static code checker fixes (Nathan)
- Clean up disabled warnings (Nathan)
- Increase timeout in i915_gem_contexts selftests 5x for GuC submission (Matt B)
- Ensure wa_init_finish() is called for ctx workaround list (Matt R)
- Initialize L3CC table in mocs init (Sreedhar, Ayaz, Ram)
- Get PM ref before accessing HW register (Vinay)
- Move __i915_gem_free_object to ttm_bo_destroy (Maarten)
- Deduplicate frequency dump on debugfs (Lucas)
- Make wa list per-gt (Venkata)
- Do not define dummy vma in stack (Venkata)
- Take pinning into account in __i915_gem_object_is_lmem (Matt B, Thomas)
- Do not report currently active engine when describing objects (Tvrtko)
- Fix pdfdocs build error by removing nested grid from GuC docs (Akira)
- Remove false warning from the rps worker (Tejas)
- Flush buffer pools on driver remove (Janusz)
- Fix runtime pm handling in i915_gem_shrink (Maarten)
- Rework TTM object initialization slightly (Thomas)
- Use fixed offset for PTEs location (Michal Wa)
- Verify result from CTB (de)register action and improve error messages (Michal Wa)
- Fix bug in user proto-context creation that leaked contexts (Matt B)

- Re-use Gen11 forcewake read functions on Gen12 (Matt R)
- Make shadow tables range-based (Matt R)
- Ditch the i915_gem_ww_ctx loop member (Thomas, Maarten)
- Use NULL instead of 0 where appropriate (Ville)
- Rename pci/debugfs functions to respect file prefix (Jani, Lucas)
- Drop guc_communication_enabled (Daniele)
- Selftest fixes (Thomas, Daniel, Matt A, Maarten)
- Clean up inconsistent indenting (Colin)
- Use direction definition DMA_BIDIRECTIONAL instead of
  PCI_DMA_BIDIRECTIONAL (Cai)
- Add "intel_" as prefix in set_mocs_index() (Ayaz)

From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/YWAO80MB2eyToYoy@jlahtine-mobl.ger.corp.intel.com


Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parents c7c774fe 1a839e01

Documentation/gpu/i915.rst

+10 −0
Original line number Diff line number Diff line
@@ -471,6 +471,14 @@ Object Tiling IOCTLs 
.. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_tiling.c

   :doc: buffer object tiling



Protected Objects

-----------------



.. kernel-doc:: drivers/gpu/drm/i915/pxp/intel_pxp.c

   :doc: PXP



.. kernel-doc:: drivers/gpu/drm/i915/pxp/intel_pxp_types.h



Microcontrollers

================
@@ -495,6 +503,8 @@ GuC 
.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc.c

   :doc: GuC



.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc.h



GuC Firmware Layout

~~~~~~~~~~~~~~~~~~~

drivers/gpu/drm/drm_modeset_lock.c

+1 −1
Original line number Diff line number Diff line
@@ -248,7 +248,7 @@ static inline int modeset_lock(struct drm_modeset_lock *lock, 
	if (ctx->trylock_only) {

		lockdep_assert_held(&ctx->ww_ctx);



		if (!ww_mutex_trylock(&lock->mutex))

		if (!ww_mutex_trylock(&lock->mutex, NULL))

			return -EBUSY;

		else

			return 0;

drivers/gpu/drm/i915/Kconfig

+11 −0
Original line number Diff line number Diff line
@@ -131,6 +131,17 @@ config DRM_I915_GVT_KVMGT 
	  Choose this option if you want to enable KVMGT support for

	  Intel GVT-g.



config DRM_I915_PXP

	bool "Enable Intel PXP support for Intel Gen12 and newer platform"

	depends on DRM_I915

	depends on INTEL_MEI && INTEL_MEI_PXP

	default n

	help

	  PXP (Protected Xe Path) is an i915 component, available on GEN12 and

	  newer GPUs, that helps to establish the hardware protected session and

	  manage the status of the alive software session, as well as its life

	  cycle.



menu "drm/i915 Debugging"

depends on DRM_I915

depends on EXPERT

drivers/gpu/drm/i915/Makefile

+18 −9
Original line number Diff line number Diff line
@@ -13,13 +13,11 @@ 
# will most likely get a sudden build breakage... Hopefully we will fix

# new warnings before CI updates!

subdir-ccflags-y := -Wall -Wextra

subdir-ccflags-y += $(call cc-disable-warning, unused-parameter)

subdir-ccflags-y += $(call cc-disable-warning, type-limits)

subdir-ccflags-y += $(call cc-disable-warning, missing-field-initializers)

subdir-ccflags-y += -Wno-unused-parameter

subdir-ccflags-y += -Wno-type-limits

subdir-ccflags-y += -Wno-missing-field-initializers

subdir-ccflags-y += -Wno-sign-compare

subdir-ccflags-y += $(call cc-disable-warning, unused-but-set-variable)

# clang warnings

subdir-ccflags-y += $(call cc-disable-warning, sign-compare)

subdir-ccflags-y += $(call cc-disable-warning, initializer-overrides)

subdir-ccflags-y += $(call cc-disable-warning, frame-address)

subdir-ccflags-$(CONFIG_DRM_I915_WERROR) += -Werror
@@ -78,9 +76,6 @@ i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o 


# "Graphics Technology" (aka we talk to the gpu)

gt-y += \

	gt/debugfs_engines.o \

	gt/debugfs_gt.o \

	gt/debugfs_gt_pm.o \

	gt/gen2_engine_cs.o \

	gt/gen6_engine_cs.o \

	gt/gen6_ppgtt.o \
@@ -100,8 +95,11 @@ gt-y += \ 
	gt/intel_gt.o \

	gt/intel_gt_buffer_pool.o \

	gt/intel_gt_clock_utils.o \

	gt/intel_gt_debugfs.o \

	gt/intel_gt_engines_debugfs.o \

	gt/intel_gt_irq.o \

	gt/intel_gt_pm.o \

	gt/intel_gt_pm_debugfs.o \

	gt/intel_gt_pm_irq.o \

	gt/intel_gt_requests.o \

	gt/intel_gtt.o \
@@ -154,6 +152,7 @@ gem-y += \ 
	gem/i915_gem_throttle.o \

	gem/i915_gem_tiling.o \

	gem/i915_gem_ttm.o \

	gem/i915_gem_ttm_pm.o \

	gem/i915_gem_userptr.o \

	gem/i915_gem_wait.o \

	gem/i915_gemfs.o
@@ -280,6 +279,16 @@ i915-y += \ 


i915-y += i915_perf.o



# Protected execution platform (PXP) support

i915-$(CONFIG_DRM_I915_PXP) += \

	pxp/intel_pxp.o \

	pxp/intel_pxp_cmd.o \

	pxp/intel_pxp_debugfs.o \

	pxp/intel_pxp_irq.o \

	pxp/intel_pxp_pm.o \

	pxp/intel_pxp_session.o \

	pxp/intel_pxp_tee.o



# Post-mortem debug and GPU hang state capture

i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o

i915-$(CONFIG_DRM_I915_SELFTEST) += \

drivers/gpu/drm/i915/display/intel_display.c

+34 −0
Original line number Diff line number Diff line
@@ -71,6 +71,8 @@ 
#include "gt/intel_rps.h"

#include "gt/gen8_ppgtt.h"



#include "pxp/intel_pxp.h"



#include "g4x_dp.h"

#include "g4x_hdmi.h"

#include "i915_drv.h"
@@ -8987,13 +8989,28 @@ static int intel_bigjoiner_add_affected_planes(struct intel_atomic_state *state) 
	return 0;

}



static bool bo_has_valid_encryption(struct drm_i915_gem_object *obj)

{

	struct drm_i915_private *i915 = to_i915(obj->base.dev);



	return intel_pxp_key_check(&i915->gt.pxp, obj, false) == 0;

}



static bool pxp_is_borked(struct drm_i915_gem_object *obj)

{

	return i915_gem_object_is_protected(obj) && !bo_has_valid_encryption(obj);

}



static int intel_atomic_check_planes(struct intel_atomic_state *state)

{

	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	struct intel_crtc_state *old_crtc_state, *new_crtc_state;

	struct intel_plane_state *plane_state;

	struct intel_plane *plane;

	struct intel_plane_state *new_plane_state;

	struct intel_plane_state *old_plane_state;

	struct intel_crtc *crtc;

	const struct drm_framebuffer *fb;

	int i, ret;



	ret = icl_add_linked_planes(state);
@@ -9041,6 +9058,19 @@ static int intel_atomic_check_planes(struct intel_atomic_state *state) 
			return ret;

	}



	for_each_new_intel_plane_in_state(state, plane, plane_state, i) {

		new_plane_state = intel_atomic_get_new_plane_state(state, plane);

		old_plane_state = intel_atomic_get_old_plane_state(state, plane);

		fb = new_plane_state->hw.fb;

		if (fb) {

			new_plane_state->decrypt = bo_has_valid_encryption(intel_fb_obj(fb));

			new_plane_state->force_black = pxp_is_borked(intel_fb_obj(fb));

		} else {

			new_plane_state->decrypt = old_plane_state->decrypt;

			new_plane_state->force_black = old_plane_state->force_black;

		}

	}



	return 0;

}
@@ -9327,6 +9357,10 @@ static int intel_atomic_check_async(struct intel_atomic_state *state) 
			drm_dbg_kms(&i915->drm, "Color range cannot be changed in async flip\n");

			return -EINVAL;

		}



		/* plane decryption is allow to change only in synchronous flips */

		if (old_plane_state->decrypt != new_plane_state->decrypt)

			return -EINVAL;

	}



	return 0;