Commit 105972be authored by Xingui Yang's avatar Xingui Yang Committed by Zheng Zengkai
Browse files

scsi: hisi_sas: Modify v3 HW SATA completion error processing 

mainline inclusion
from mainline-v6.0-rc1
commit 7e15334f
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I5WRGD
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=7e15334f5d25

----------------------------------------------------------------------

If the I/O completion response frame returned by the target device has been
written to the host memory and the err bit in the status field of the
received fis is 1, ts->stat should set to SAS_PROTO_RESPONSE, and this will
let EH analyze and further determine cause of failure.

Link: https://lore.kernel.org/r/1657823002-139010-5-git-send-email-john.garry@huawei.com


Signed-off-by: default avatarXingui Yang <yangxingui@huawei.com>
Signed-off-by: default avatarJohn Garry <john.garry@huawei.com>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: default avatarxiabing <xiabing12@h-partners.com>
Reviewed-by: default avatarXiang Chen <chenxiang66@hisilicon.com>
Reviewed-by: default avatarJason Yan <yanaijie@huawei.com>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
parent 2480a2a8

drivers/scsi/hisi_sas/hisi_sas_v3_hw.c

+8 −1
Original line number Diff line number Diff line
@@ -480,6 +480,9 @@ struct hisi_sas_err_record_v3 { 
#define RX_DATA_LEN_UNDERFLOW_OFF	6

#define RX_DATA_LEN_UNDERFLOW_MSK	(1 << RX_DATA_LEN_UNDERFLOW_OFF)



#define RX_FIS_STATUS_ERR_OFF		0

#define RX_FIS_STATUS_ERR_MSK		(1 << RX_FIS_STATUS_ERR_OFF)



#define HISI_SAS_COMMAND_ENTRIES_V3_HW 4096

#define HISI_SAS_MSI_COUNT_V3_HW 32
@@ -2158,6 +2161,7 @@ slot_err_v3_hw(struct hisi_hba *hisi_hba, struct sas_task *task, 
			hisi_sas_status_buf_addr_mem(slot);

	u32 dma_rx_err_type = le32_to_cpu(record->dma_rx_err_type);

	u32 trans_tx_fail_type = le32_to_cpu(record->trans_tx_fail_type);

	u16 sipc_rx_err_type = le16_to_cpu(record->sipc_rx_err_type);

	u32 dw3 = le32_to_cpu(complete_hdr->dw3);



	switch (task->task_proto) {
@@ -2185,7 +2189,10 @@ slot_err_v3_hw(struct hisi_hba *hisi_hba, struct sas_task *task, 
	case SAS_PROTOCOL_SATA:

	case SAS_PROTOCOL_STP:

	case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:

		if (dma_rx_err_type & RX_DATA_LEN_UNDERFLOW_MSK) {

		if ((complete_hdr->dw0 & CMPLT_HDR_RSPNS_XFRD_MSK) &&

		    (sipc_rx_err_type & RX_FIS_STATUS_ERR_MSK)) {

			ts->stat = SAS_PROTO_RESPONSE;

		} else if (dma_rx_err_type & RX_DATA_LEN_UNDERFLOW_MSK) {

			ts->residual = trans_tx_fail_type;

			ts->stat = SAS_DATA_UNDERRUN;

		} else if (dw3 & CMPLT_HDR_IO_IN_TARGET_MSK) {