Commit 103b8842 authored by Mark Brown's avatar Mark Brown Committed by Catalin Marinas
Browse files

arm64/sysreg: Convert MDSCR_EL1 to automatic register generation 



Convert MDSCR_EL1 to automatic register generation as per DDI0616 2023-03.
No functional change.

Reviewed-by: default avatarShaoqin Huang <shahuang@redhat.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Reviewed-by: default avatarOliver Upton <oliver.upton@linux.dev>
Link: https://lore.kernel.org/r/20230419-arm64-syreg-gen-v2-2-4c6add1f6257@kernel.org


Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 3def3387

arch/arm64/include/asm/sysreg.h

+0 −1
Original line number Diff line number Diff line
@@ -135,7 +135,6 @@ 
#define SYS_SVCR_SMSTOP_SMZA_EL0	sys_reg(0, 3, 4, 6, 3)



#define SYS_OSDTRRX_EL1			sys_reg(2, 0, 0, 0, 2)

#define SYS_MDSCR_EL1			sys_reg(2, 0, 0, 2, 2)

#define SYS_OSDTRTX_EL1			sys_reg(2, 0, 0, 3, 2)

#define SYS_OSECCR_EL1			sys_reg(2, 0, 0, 6, 2)

#define SYS_DBGBVRn_EL1(n)		sys_reg(2, 0, 0, n, 4)

arch/arm64/tools/sysreg

+28 −0
Original line number Diff line number Diff line
@@ -55,6 +55,34 @@ Field 29 TX 
Res0	28:0

EndSysreg



Sysreg	MDSCR_EL1	2	0	0	2	2

Res0	63:36

Field	35	EHBWE

Field	34	EnSPM

Field	33	TTA

Field	32	EMBWE

Field	31	TFO

Field	30	RXfull

Field	29	TXfull

Res0	28

Field	27	RXO

Field	26	TXU

Res0	25:24

Field	23:22	INTdis

Field	21	TDA

Res0	20

Field	19	SC2

Res0	18:16

Field	15	MDE

Field	14	HDE

Field	13	KDE

Field	12	TDCC

Res0	11:7

Field	6	ERR

Res0	5:1

Field	0	SS

EndSysreg



Sysreg ID_PFR0_EL1	3	0	0	1	0

Res0	63:32

UnsignedEnum	31:28	RAS