Commit 3def3387 authored May 23, 2023 by Mark Brown Committed by Catalin Marinas Jun 06, 2023

arm64/sysreg: Convert MDCCINT_EL1 to automatic register generation



Convert MDCCINT_EL1 to automatic register generation as per DDI0616
2023-03. No functional change.

Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Oliver Upton <oliver.upton@linux.dev>
Link: https://lore.kernel.org/r/20230419-arm64-syreg-gen-v2-1-4c6add1f6257@kernel.org


Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

parent 44c026a7

arch/arm64/include/asm/sysreg.h

+0 −1

Original line number	Diff line number	Diff line
		@@ -135,7 +135,6 @@
		#define SYS_SVCR_SMSTOP_SMZA_EL0 sys_reg(0, 3, 4, 6, 3)

		#define SYS_OSDTRRX_EL1 sys_reg(2, 0, 0, 0, 2)
		#define SYS_MDCCINT_EL1 sys_reg(2, 0, 0, 2, 0)
		#define SYS_MDSCR_EL1 sys_reg(2, 0, 0, 2, 2)
		#define SYS_OSDTRTX_EL1 sys_reg(2, 0, 0, 3, 2)
		#define SYS_OSECCR_EL1 sys_reg(2, 0, 0, 6, 2)

arch/arm64/tools/sysreg

+7 −0

Original line number	Diff line number	Diff line
		@@ -48,6 +48,13 @@
		# feature that introduces them (eg, FEAT_LS64_ACCDATA introduces enumeration
		# item ACCDATA) though it may be more taseful to do something else.

		Sysreg MDCCINT_EL1 2 0 0 2 0
		Res0 63:31
		Field 30 RX
		Field 29 TX
		Res0 28:0
		EndSysreg

		Sysreg ID_PFR0_EL1 3 0 0 1 0
		Res0 63:32
		UnsignedEnum 31:28 RAS