Commit 0f2a6c3b authored by Muhammad Sammar's avatar Muhammad Sammar Committed by Saeed Mahameed
Browse files

net/mlx5: Add misc5 flow table match parameters 



Add support for misc5 match parameter as per HW spec, this will allow
matching on tunnel_header fields.

Signed-off-by: default avatarMuhammad Sammar <muhammads@nvidia.com>
Signed-off-by: default avatarYevgeny Kliteynik <kliteyn@nvidia.com>
parent b5412827

drivers/net/ethernet/mellanox/mlx5/core/fs_core.h

+1 −1
Original line number Diff line number Diff line
@@ -203,7 +203,7 @@ struct mlx5_ft_underlay_qp { 
	u32 qpn;

};



#define MLX5_FTE_MATCH_PARAM_RESERVED	reserved_at_c00

#define MLX5_FTE_MATCH_PARAM_RESERVED	reserved_at_e00

/* Calculate the fte_match_param length and without the reserved length.

 * Make sure the reserved field is the last.

 */

include/linux/mlx5/device.h

+1 −0
Original line number Diff line number Diff line
@@ -1117,6 +1117,7 @@ enum { 
	MLX5_MATCH_MISC_PARAMETERS_2	= 1 << 3,

	MLX5_MATCH_MISC_PARAMETERS_3	= 1 << 4,

	MLX5_MATCH_MISC_PARAMETERS_4	= 1 << 5,

	MLX5_MATCH_MISC_PARAMETERS_5	= 1 << 6,

};



enum {

include/linux/mlx5/mlx5_ifc.h

+24 −1
Original line number Diff line number Diff line
@@ -670,6 +670,26 @@ struct mlx5_ifc_fte_match_set_misc4_bits { 
	u8         reserved_at_100[0x100];

};



struct mlx5_ifc_fte_match_set_misc5_bits {

	u8         macsec_tag_0[0x20];



	u8         macsec_tag_1[0x20];



	u8         macsec_tag_2[0x20];



	u8         macsec_tag_3[0x20];



	u8         tunnel_header_0[0x20];



	u8         tunnel_header_1[0x20];



	u8         tunnel_header_2[0x20];



	u8         tunnel_header_3[0x20];



	u8         reserved_at_100[0x100];

};



struct mlx5_ifc_cmd_pas_bits {

	u8         pa_h[0x20];
@@ -1839,7 +1859,9 @@ struct mlx5_ifc_fte_match_param_bits { 


	struct mlx5_ifc_fte_match_set_misc4_bits misc_parameters_4;



	u8         reserved_at_c00[0x400];

	struct mlx5_ifc_fte_match_set_misc5_bits misc_parameters_5;



	u8         reserved_at_e00[0x200];

};



enum {
@@ -5977,6 +5999,7 @@ enum { 
	MLX5_QUERY_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS_2 = 0x3,

	MLX5_QUERY_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS_3 = 0x4,

	MLX5_QUERY_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS_4 = 0x5,

	MLX5_QUERY_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS_5 = 0x6,

};



struct mlx5_ifc_query_flow_group_out_bits {

include/uapi/rdma/mlx5_user_ioctl_cmds.h

+1 −1
Original line number Diff line number Diff line
@@ -252,7 +252,7 @@ enum mlx5_ib_device_query_context_attrs { 
	MLX5_IB_ATTR_QUERY_CONTEXT_RESP_UCTX = (1U << UVERBS_ID_NS_SHIFT),

};



#define MLX5_IB_DW_MATCH_PARAM 0x90

#define MLX5_IB_DW_MATCH_PARAM 0xA0



struct mlx5_ib_match_params {

	__u32	match_params[MLX5_IB_DW_MATCH_PARAM];