Commit 0db0e2eb authored by Thomas Gleixner's avatar Thomas Gleixner Committed by Aubrey Li
Browse files

x86/microcode: Protect against instrumentation

mainline inclusion
from mainline-v6.7-rc1
commit 1582c0f4a21303792f523fe2839dd8433ee630c0
category: feature
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I8XRMW


CVE: NA

--------------------------------

The wait for control loop in which the siblings are waiting for the
microcode update on the primary thread must be protected against
instrumentation as instrumentation can end up in #INT3, #DB or #PF,
which then returns with IRET. That IRET reenables NMI which is the
opposite of what the NMI rendezvous is trying to achieve.

Intel-SIG: commit 1582c0f4a213 x86/microcode: Protect against instrumentation.
Microcode restructuring backport.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20231002115903.545969323@linutronix.de


[ Aubrey Li: amend commit log ]
Signed-off-by: default avatarAubrey Li <aubrey.li@linux.intel.com>
parent 7aba545d
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