Commit 0cbcfbe5 authored by Taniya Das's avatar Taniya Das Committed by Bjorn Andersson
Browse files

clk: qcom: lpass: Handle the regmap overlap of lpasscc and lpass_aon 



Move registration of lpass_q6ss_ahbm_clk and lpass_q6ss_ahbs_clk to
lpass_aon_cc_sc7280_probe and register them only if "qcom,adsp-pil-mode"
is enabled in the lpass_aon DT node.

Signed-off-by: default avatarTaniya Das <quic_tdas@quicinc.com>
Signed-off-by: default avatarSatya Priya <quic_c_skakit@quicinc.com>
Reviewed-by: default avatarStephen Boyd <sboyd@kernel.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1662005846-4838-3-git-send-email-quic_c_skakit@quicinc.com
parent adb12f06

drivers/clk/qcom/lpassaudiocc-sc7280.c

+44 −0
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ 
#include <linux/pm_runtime.h>

#include <linux/regmap.h>



#include <dt-bindings/clock/qcom,lpass-sc7280.h>

#include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>



#include "clk-alpha-pll.h"
@@ -38,6 +39,32 @@ static const struct pll_vco zonda_vco[] = { 
	{ 595200000UL, 3600000000UL, 0 },

};



static struct clk_branch lpass_q6ss_ahbm_clk = {

	.halt_reg = 0x901c,

	.halt_check = BRANCH_HALT,

	.clkr = {

		.enable_reg = 0x901c,

		.enable_mask = BIT(0),

		.hw.init = &(struct clk_init_data){

				.name = "lpass_q6ss_ahbm_clk",

				.ops = &clk_branch2_ops,

		},

	},

};



static struct clk_branch lpass_q6ss_ahbs_clk = {

	.halt_reg = 0x9020,

	.halt_check = BRANCH_HALT_VOTED,

	.clkr = {

		.enable_reg = 0x9020,

		.enable_mask = BIT(0),

		.hw.init = &(struct clk_init_data){

			.name = "lpass_q6ss_ahbs_clk",

			.ops = &clk_branch2_ops,

		},

	},

};



/* 1128.96MHz configuration */

static const struct alpha_pll_config lpass_audio_cc_pll_config = {

	.l = 0x3a,
@@ -614,6 +641,11 @@ static struct gdsc lpass_aon_cc_lpass_audio_hm_gdsc = { 
	.flags = RETAIN_FF_ENABLE,

};



static struct clk_regmap *lpass_cc_sc7280_clocks[] = {

	[LPASS_Q6SS_AHBM_CLK] = &lpass_q6ss_ahbm_clk.clkr,

	[LPASS_Q6SS_AHBS_CLK] = &lpass_q6ss_ahbs_clk.clkr,

};



static struct clk_regmap *lpass_aon_cc_sc7280_clocks[] = {

	[LPASS_AON_CC_AUDIO_HM_H_CLK] = &lpass_aon_cc_audio_hm_h_clk.clkr,

	[LPASS_AON_CC_VA_MEM0_CLK] = &lpass_aon_cc_va_mem0_clk.clkr,
@@ -659,6 +691,12 @@ static struct regmap_config lpass_audio_cc_sc7280_regmap_config = { 
	.fast_io = true,

};



static const struct qcom_cc_desc lpass_cc_sc7280_desc = {

	.config = &lpass_audio_cc_sc7280_regmap_config,

	.clks = lpass_cc_sc7280_clocks,

	.num_clks = ARRAY_SIZE(lpass_cc_sc7280_clocks),

};



static const struct qcom_cc_desc lpass_audio_cc_sc7280_desc = {

	.config = &lpass_audio_cc_sc7280_regmap_config,

	.clks = lpass_audio_cc_sc7280_clocks,
@@ -785,6 +823,12 @@ static int lpass_aon_cc_sc7280_probe(struct platform_device *pdev) 
	if (ret)

		return ret;



	if (of_property_read_bool(pdev->dev.of_node, "qcom,adsp-pil-mode")) {

		lpass_audio_cc_sc7280_regmap_config.name = "cc";

		desc = &lpass_cc_sc7280_desc;

		return qcom_cc_probe(pdev, desc);

	}



	lpass_audio_cc_sc7280_regmap_config.name = "lpasscc_aon";

	lpass_audio_cc_sc7280_regmap_config.max_register = 0xa0008;

	desc = &lpass_aon_cc_sc7280_desc;

drivers/clk/qcom/lpasscc-sc7280.c

+0 −44
Original line number Diff line number Diff line
@@ -17,32 +17,6 @@ 
#include "clk-branch.h"

#include "common.h"



static struct clk_branch lpass_q6ss_ahbm_clk = {

	.halt_reg = 0x1c,

	.halt_check = BRANCH_HALT,

	.clkr = {

		.enable_reg = 0x1c,

		.enable_mask = BIT(0),

		.hw.init = &(struct clk_init_data){

			.name = "lpass_q6ss_ahbm_clk",

			.ops = &clk_branch2_ops,

		},

	},

};



static struct clk_branch lpass_q6ss_ahbs_clk = {

	.halt_reg = 0x20,

	.halt_check = BRANCH_HALT_VOTED,

	.clkr = {

		.enable_reg = 0x20,

		.enable_mask = BIT(0),

		.hw.init = &(struct clk_init_data){

			.name = "lpass_q6ss_ahbs_clk",

			.ops = &clk_branch2_ops,

		},

	},

};



static struct clk_branch lpass_top_cc_lpi_q6_axim_hs_clk = {

	.halt_reg = 0x0,

	.halt_check = BRANCH_HALT,
@@ -105,17 +79,6 @@ static struct regmap_config lpass_regmap_config = { 
	.fast_io	= true,

};



static struct clk_regmap *lpass_cc_sc7280_clocks[] = {

	[LPASS_Q6SS_AHBM_CLK] = &lpass_q6ss_ahbm_clk.clkr,

	[LPASS_Q6SS_AHBS_CLK] = &lpass_q6ss_ahbs_clk.clkr,

};



static const struct qcom_cc_desc lpass_cc_sc7280_desc = {

	.config = &lpass_regmap_config,

	.clks = lpass_cc_sc7280_clocks,

	.num_clks = ARRAY_SIZE(lpass_cc_sc7280_clocks),

};



static struct clk_regmap *lpass_cc_top_sc7280_clocks[] = {

	[LPASS_TOP_CC_LPI_Q6_AXIM_HS_CLK] =

				&lpass_top_cc_lpi_q6_axim_hs_clk.clkr,
@@ -169,13 +132,6 @@ static int lpass_cc_sc7280_probe(struct platform_device *pdev) 
	if (ret)

		goto destroy_pm_clk;



	lpass_regmap_config.name = "cc";

	desc = &lpass_cc_sc7280_desc;



	ret = qcom_cc_probe_by_index(pdev, 2, desc);

	if (ret)

		goto destroy_pm_clk;



	return 0;



destroy_pm_clk: