dt-bindings: irqchip: renesas-intc-irqpin: Convert to json-schema

DT bindings for the R-/SH-Mobile irqpin controller

Required properties:

- compatible: has to be "renesas,intc-irqpin-<soctype>", "renesas,intc-irqpin"

  as fallback.

  Examples with soctypes are:

    - "renesas,intc-irqpin-r8a7740" (R-Mobile A1)

    - "renesas,intc-irqpin-r8a7778" (R-Car M1A)

    - "renesas,intc-irqpin-r8a7779" (R-Car H1)

    - "renesas,intc-irqpin-sh73a0" (SH-Mobile AG5)

- reg: Base address and length of each register bank used by the external

  IRQ pins driven by the interrupt controller hardware module. The base

  addresses, length and number of required register banks varies with soctype.

- interrupt-controller: Identifies the node as an interrupt controller.

- #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in

  interrupts.txt in this directory.

- interrupts: Must contain a list of interrupt specifiers. For each interrupt

  provided by this irqpin controller instance, there must be one entry,

  referring to the corresponding parent interrupt.

Optional properties:

- any properties, listed in interrupts.txt, and any standard resource allocation

  properties

- sense-bitfield-width: width of a single sense bitfield in the SENSE register,

  if different from the default 4 bits

- control-parent: disable and enable interrupts on the parent interrupt

  controller, needed for some broken implementations

- clocks: Must contain a reference to the functional clock.  This property is

  mandatory if the hardware implements a controllable functional clock for

  the irqpin controller instance.

- power-domains: Must contain a reference to the power domain. This property is

  mandatory if the irqpin controller instance is part of a controllable power

  domain.

Example

-------

	irqpin1: interrupt-controller@e6900004 {

		compatible = "renesas,intc-irqpin-r8a7740",

			     "renesas,intc-irqpin";

		#interrupt-cells = <2>;

		interrupt-controller;

		reg = <0xe6900004 4>,

			<0xe6900014 4>,

			<0xe6900024 1>,

			<0xe6900044 1>,

			<0xe6900064 1>;

		interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH

			      0 149 IRQ_TYPE_LEVEL_HIGH

			      0 149 IRQ_TYPE_LEVEL_HIGH

			      0 149 IRQ_TYPE_LEVEL_HIGH

			      0 149 IRQ_TYPE_LEVEL_HIGH

			      0 149 IRQ_TYPE_LEVEL_HIGH

			      0 149 IRQ_TYPE_LEVEL_HIGH

			      0 149 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp2_clks R8A7740_CLK_INTCA>;

		power-domains = <&pd_a4s>;

	};

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/interrupt-controller/renesas,intc-irqpin.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Renesas Interrupt Controller (INTC) for external pins

maintainers:

  - Geert Uytterhoeven <geert+renesas@glider.be>

properties:

  compatible:

    items:

      - enum:

          - renesas,intc-irqpin-r8a7740  # R-Mobile A1

          - renesas,intc-irqpin-r8a7778  # R-Car M1A

          - renesas,intc-irqpin-r8a7779  # R-Car H1

          - renesas,intc-irqpin-sh73a0   # SH-Mobile AG5

      - const: renesas,intc-irqpin

  reg:

    minItems: 5

    items:

      - description: Interrupt control register

      - description: Interrupt priority register

      - description: Interrupt source register

      - description: Interrupt mask register

      - description: Interrupt mask clear register

      - description: Interrupt control register for ICR0 with IRLM0 bit

  interrupt-controller: true

  '#interrupt-cells':

    const: 2

  interrupts:

    minItems: 1

    maxItems: 8

  sense-bitfield-width:

    $ref: /schemas/types.yaml#/definitions/uint32

    enum: [2, 4]

    default: 4

    description:

      Width of a single sense bitfield in the SENSE register, if different from the

      default.

  control-parent:

    type: boolean

    description:

      Disable and enable interrupts on the parent interrupt controller, needed for some

      broken implementations.

  clocks:

    maxItems: 1

  power-domains:

    maxItems: 1

required:

  - compatible

  - reg

  - interrupt-controller

  - '#interrupt-cells'

  - interrupts

if:

  properties:

    compatible:

      contains:

        enum:

          - renesas,intc-irqpin-r8a7740

          - renesas,intc-irqpin-sh73a0

then:

  required:

    - clocks

    - power-domains

additionalProperties: false

examples:

  - |

    #include <dt-bindings/clock/r8a7740-clock.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/interrupt-controller/irq.h>

    irqpin1: interrupt-controller@e6900004 {

        compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";

        reg = <0xe6900004 4>,

              <0xe6900014 4>,

              <0xe6900024 1>,

              <0xe6900044 1>,

              <0xe6900064 1>;

        interrupt-controller;

        #interrupt-cells = <2>;

        interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;

        clocks = <&mstp2_clks R8A7740_CLK_INTCA>;

        power-domains = <&pd_a4s>;

    };