Commit 0aae437a authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

clk: renesas: Rename renesas-rzg2l-cpg.[ch] to rzg2l-cpg.[ch] 



Rename renesas-rzg2l-cpg.c and renesas-rzg2l-cpg.h to rzg2l-cpg.c resp.
rzg2l-cpg.h, for consistency with other (sub)drivers.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/edc442daaedffcf10e835ff479d906fcae0e59db.1626268821.git.geert+renesas@glider.be
parent d85b82f0

drivers/clk/renesas/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -37,7 +37,7 @@ obj-$(CONFIG_CLK_RCAR_CPG_LIB) += rcar-cpg-lib.o 
obj-$(CONFIG_CLK_RCAR_GEN2_CPG)		+= rcar-gen2-cpg.o

obj-$(CONFIG_CLK_RCAR_GEN3_CPG)		+= rcar-gen3-cpg.o

obj-$(CONFIG_CLK_RCAR_USB2_CLOCK_SEL)	+= rcar-usb2-clock-sel.o

obj-$(CONFIG_CLK_RZG2L)			+= renesas-rzg2l-cpg.o

obj-$(CONFIG_CLK_RZG2L)			+= rzg2l-cpg.o



# Generic

obj-$(CONFIG_CLK_RENESAS_CPG_MSSR)	+= renesas-cpg-mssr.o

drivers/clk/renesas/r9a07g044-cpg.c

+1 −1
Original line number Diff line number Diff line
@@ -12,7 +12,7 @@ 


#include <dt-bindings/clock/r9a07g044-cpg.h>



#include "renesas-rzg2l-cpg.h"

#include "rzg2l-cpg.h"



enum clk_ids {

	/* Core Clock Outputs exported to DT */

drivers/clk/renesas/renesas-rzg2l-cpg.c→drivers/clk/renesas/rzg2l-cpg.c

+1 −1
Original line number Diff line number Diff line
@@ -29,7 +29,7 @@ 


#include <dt-bindings/clock/renesas-cpg-mssr.h>



#include "renesas-rzg2l-cpg.h"

#include "rzg2l-cpg.h"



#ifdef DEBUG

#define WARN_DEBUG(x)	WARN_ON(x)