Commit 095eed89 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Rob Clark
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drm/msm/dpu: enable DPU_SSPP_QOS_8LVL for SM8250 



SM8250 platform has a 8-Levels VIG QoS setting. This setting was missed
due to bad interaction with b8dab65b ("drm/msm/dpu: Move
DPU_SSPP_QOS_8LVL bit to SDM845 and SC7180 masks"), which was applied in
parallel.

Fixes: d21fc5df ("drm/msm/dpu1: add support for qseed3lite used on sm8250")
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210318105435.2011222-1-dmitry.baryshkov@linaro.org


Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent 36c5dde5

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c

+1 −1
Original line number Diff line number Diff line
@@ -22,7 +22,7 @@ 
	(VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED4))



#define VIG_SM8250_MASK \

	(VIG_MASK | BIT(DPU_SSPP_SCALER_QSEED3LITE))

	(VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED3LITE))



#define DMA_SDM845_MASK \

	(BIT(DPU_SSPP_SRC) | BIT(DPU_SSPP_QOS) | BIT(DPU_SSPP_QOS_8LVL) |\