perf/x86/intel: Factor out intel_update_topdown_event()

mainline inclusion
from mainline-v5.12-rc1
commit 628d923a
category: feature
feature: SPR PMU core event enhancement
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I596BF



Intel-SIG: commit 628d923a ("perf/x86/intel: Factor out
intel_update_topdown_event()")

-------------------------------------

Similar to Ice Lake, Intel Sapphire Rapids server also supports the
topdown performance metrics feature. The difference is that Intel
Sapphire Rapids server extends the PERF_METRICS MSR to feature TMA
method level two metrics, which will introduce 8 metrics events. Current
icl_update_topdown_event() only check 4 level one metrics events.

Factor out intel_update_topdown_event() to facilitate the code sharing
between Ice Lake and Sapphire Rapids.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/1611873611-156687-3-git-send-email-kan.liang@linux.intel.com


Signed-off-by: Yunying Sun <yunying.sun@intel.com>
Signed-off-by: Jun Tian <jun.j.tian@intel.com>
Signed-off-by: Jason Zeng <jason.zeng@intel.com>
Signed-off-by: Aichun Shi <aichun.shi@intel.com>