Commit 072ce416 authored by Stanislav Lisovskiy's avatar Stanislav Lisovskiy
Browse files

drm/i915/dg2: Tile 4 plane format support 



Tile4 in bspec format is 4K tile organized into
64B subtiles with same basic shape as for legacy TileY
which will be supported by Display13.

v2: - Moved Tile4 associating struct for modifier/display to
      the beginning(Imre Deak)
    - Removed unneeded case I915_FORMAT_MOD_4_TILED modifier
      checks(Imre Deak)
    - Fixed I915_FORMAT_MOD_4_TILED to be 9 instead of 12
      (Imre Deak)

v3: - Rebased patch on top of new changes related to plane_caps.
    - Added static assert to check that PLANE_CTL_TILING_YF
      matches PLANE_CTL_TILING_4(Nanley Chery)
    - Fixed naming and layout description for Tile 4 in drm uapi
      header(Nanley Chery)

v4: - Extracted drm_fourcc changes to separate patch(Nanley Chery)

Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: default avatarStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Signed-off-by: default avatarJuha-Pekka Heikkilä <juha-pekka.heikkila@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220118115544.15116-3-stanislav.lisovskiy@intel.com
parent c6e7deb0

drivers/gpu/drm/i915/display/intel_display.c

+1 −0
Original line number Diff line number Diff line
@@ -7458,6 +7458,7 @@ static int intel_atomic_check_async(struct intel_atomic_state *state, struct int 
		case I915_FORMAT_MOD_X_TILED:

		case I915_FORMAT_MOD_Y_TILED:

		case I915_FORMAT_MOD_Yf_TILED:

		case I915_FORMAT_MOD_4_TILED:

			break;

		default:

			drm_dbg_kms(&i915->drm,

drivers/gpu/drm/i915/display/intel_fb.c

+14 −1
Original line number Diff line number Diff line
@@ -135,11 +135,16 @@ struct intel_modifier_desc { 
					 INTEL_PLANE_CAP_CCS_MC)

#define INTEL_PLANE_CAP_TILING_MASK	(INTEL_PLANE_CAP_TILING_X | \

					 INTEL_PLANE_CAP_TILING_Y | \

					 INTEL_PLANE_CAP_TILING_Yf)

					 INTEL_PLANE_CAP_TILING_Yf | \

					 INTEL_PLANE_CAP_TILING_4)

#define INTEL_PLANE_CAP_TILING_NONE	0



static const struct intel_modifier_desc intel_modifiers[] = {

	{

		.modifier = I915_FORMAT_MOD_4_TILED,

		.display_ver = { 13, 13 },

		.plane_caps = INTEL_PLANE_CAP_TILING_4,

	}, {

		.modifier = I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS,

		.display_ver = { 12, 13 },

		.plane_caps = INTEL_PLANE_CAP_TILING_Y | INTEL_PLANE_CAP_CCS_MC,
@@ -545,6 +550,12 @@ intel_tile_width_bytes(const struct drm_framebuffer *fb, int color_plane) 
			return 128;

		else

			return 512;

	case I915_FORMAT_MOD_4_TILED:

		/*

		 * Each 4K tile consists of 64B(8*8) subtiles, with

		 * same shape as Y Tile(i.e 4*16B OWords)

		 */

		return 128;

	case I915_FORMAT_MOD_Y_TILED_CCS:

		if (intel_fb_is_ccs_aux_plane(fb, color_plane))

			return 128;
@@ -650,6 +661,7 @@ static unsigned int intel_fb_modifier_to_tiling(u64 fb_modifier) 
		return I915_TILING_Y;

	case INTEL_PLANE_CAP_TILING_X:

		return I915_TILING_X;

	case INTEL_PLANE_CAP_TILING_4:

	case INTEL_PLANE_CAP_TILING_Yf:

	case INTEL_PLANE_CAP_TILING_NONE:

		return I915_TILING_NONE;
@@ -737,6 +749,7 @@ unsigned int intel_surf_alignment(const struct drm_framebuffer *fb, 
	case I915_FORMAT_MOD_Y_TILED_CCS:

	case I915_FORMAT_MOD_Yf_TILED_CCS:

	case I915_FORMAT_MOD_Y_TILED:

	case I915_FORMAT_MOD_4_TILED:

	case I915_FORMAT_MOD_Yf_TILED:

		return 1 * 1024 * 1024;

	default:

drivers/gpu/drm/i915/display/intel_fb.h

+1 −0
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ struct intel_plane_state; 
#define INTEL_PLANE_CAP_TILING_X	BIT(3)

#define INTEL_PLANE_CAP_TILING_Y	BIT(4)

#define INTEL_PLANE_CAP_TILING_Yf	BIT(5)

#define INTEL_PLANE_CAP_TILING_4	BIT(6)



bool intel_fb_is_ccs_modifier(u64 modifier);

bool intel_fb_is_rc_ccs_cc_modifier(u64 modifier);

drivers/gpu/drm/i915/display/intel_fbc.c

+1 −0
Original line number Diff line number Diff line
@@ -946,6 +946,7 @@ static bool tiling_is_valid(const struct intel_plane_state *plane_state) 
	case I915_FORMAT_MOD_Y_TILED:

	case I915_FORMAT_MOD_Yf_TILED:

		return DISPLAY_VER(i915) >= 9;

	case I915_FORMAT_MOD_4_TILED:

	case I915_FORMAT_MOD_X_TILED:

		return true;

	default:

drivers/gpu/drm/i915/display/intel_plane_initial.c

+1 −0
Original line number Diff line number Diff line
@@ -127,6 +127,7 @@ intel_alloc_initial_plane_obj(struct intel_crtc *crtc, 
	case DRM_FORMAT_MOD_LINEAR:

	case I915_FORMAT_MOD_X_TILED:

	case I915_FORMAT_MOD_Y_TILED:

	case I915_FORMAT_MOD_4_TILED:

		break;

	default:

		drm_dbg(&dev_priv->drm,