Commit 061a9aea authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Rob Clark
Browse files

dt-bindings: display: msm: dsi-controller-main: restore assigned-clocks 



Restore the assgined-clocks and assigned-clock-parents properties that
were lost during the txt -> YAML conversion.

Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210709210729.953114-2-dmitry.baryshkov@linaro.org


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent a41cdb69

Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml

+17 −0
Original line number Diff line number Diff line
@@ -64,6 +64,18 @@ properties: 
      Indicates if the DSI controller is driving a panel which needs

      2 DSI links.



  assigned-clocks:

    minItems: 2

    maxItems: 2

    description: |

      Parents of "byte" and "pixel" for the given platform.



  assigned-clock-parents:

    minItems: 2

    maxItems: 2

    description: |

      The Byte clock and Pixel clock PLL outputs provided by a DSI PHY block.



  power-domains:

    maxItems: 1
@@ -119,6 +131,8 @@ required: 
  - clock-names

  - phys

  - phy-names

  - assigned-clocks

  - assigned-clock-parents

  - power-domains

  - operating-points-v2

  - ports
@@ -159,6 +173,9 @@ examples: 
           phys = <&dsi0_phy>;

           phy-names = "dsi";



           assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;

           assigned-clock-parents = <&dsi_phy 0>, <&dsi_phy 1>;



           power-domains = <&rpmhpd SC7180_CX>;

           operating-points-v2 = <&dsi_opp_table>;