Commit 05a23a76 authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Rob Clark
Browse files

drm/msm/a6xx: Remove both GBIF and RBBM GBIF halt on hw init 



Currently we're only deasserting REG_A6XX_RBBM_GBIF_HALT, but we also
need REG_A6XX_GBIF_HALT to be set to 0.

This is typically done automatically on successful GX collapse, but in
case that fails, we should take care of it.

Also, add a memory barrier to ensure it's gone through before jumping
to further initialization.

Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/542760/


Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent 277b9678

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

+5 −1
Original line number Diff line number Diff line
@@ -1111,8 +1111,12 @@ static int hw_init(struct msm_gpu *gpu) 
	a6xx_gmu_set_oob(&a6xx_gpu->gmu, GMU_OOB_GPU_SET);



	/* Clear GBIF halt in case GX domain was not collapsed */

	if (a6xx_has_gbif(adreno_gpu))

	if (a6xx_has_gbif(adreno_gpu)) {

		gpu_write(gpu, REG_A6XX_GBIF_HALT, 0);

		gpu_write(gpu, REG_A6XX_RBBM_GBIF_HALT, 0);

		/* Let's make extra sure that the GPU can access the memory.. */

		mb();

	}



	gpu_write(gpu, REG_A6XX_RBBM_SECVID_TSB_CNTL, 0);