Commit 277b9678 authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Rob Clark
Browse files

drm/msm/a6xx: Add a helper for software-resetting the GPU 



Introduce a6xx_gpu_sw_reset() in preparation for adding GMU wrapper
GPUs and reuse it in a6xx_gmu_force_off().

This helper, contrary to the original usage in GMU code paths, adds
a readback+delay sequence to ensure that the reset is never deasserted
too quickly due to e.g. OoO execution going crazy.

Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/542758/


Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent 3773a57d

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

+1 −2
Original line number Diff line number Diff line
@@ -899,8 +899,7 @@ static void a6xx_gmu_force_off(struct a6xx_gmu *gmu) 
	a6xx_bus_clear_pending_transactions(adreno_gpu, true);



	/* Reset GPU core blocks */

	gpu_write(gpu, REG_A6XX_RBBM_SW_RESET_CMD, 1);

	udelay(100);

	a6xx_gpu_sw_reset(gpu, true);

}



static void a6xx_gmu_set_initial_freq(struct msm_gpu *gpu, struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

+12 −0
Original line number Diff line number Diff line
@@ -1742,6 +1742,18 @@ void a6xx_bus_clear_pending_transactions(struct adreno_gpu *adreno_gpu, bool gx_ 
	gpu_write(gpu, REG_A6XX_GBIF_HALT, 0x0);

}



void a6xx_gpu_sw_reset(struct msm_gpu *gpu, bool assert)

{

	gpu_write(gpu, REG_A6XX_RBBM_SW_RESET_CMD, assert);

	/* Perform a bogus read and add a brief delay to ensure ordering. */

	gpu_read(gpu, REG_A6XX_RBBM_SW_RESET_CMD);

	udelay(1);



	/* The reset line needs to be asserted for at least 100 us */

	if (assert)

		udelay(100);

}



static int a6xx_pm_resume(struct msm_gpu *gpu)

{

	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

+1 −0
Original line number Diff line number Diff line
@@ -89,5 +89,6 @@ struct msm_gpu_state *a6xx_gpu_state_get(struct msm_gpu *gpu); 
int a6xx_gpu_state_put(struct msm_gpu_state *state);



void a6xx_bus_clear_pending_transactions(struct adreno_gpu *adreno_gpu, bool gx_off);

void a6xx_gpu_sw_reset(struct msm_gpu *gpu, bool assert);



#endif /* __A6XX_GPU_H__ */