Commit 02005282 authored by Suzuki K Poulose's avatar Suzuki K Poulose Committed by Greg Kroah-Hartman
Browse files

coresight: Convert coresight_timeout to use access abstraction 

Convert the generic routines to use the new access abstraction layer
gradually, starting with coresigth_timeout.

Link: https://lore.kernel.org/r/20210110224850.1880240-6-suzuki.poulose@arm.com


Cc: Mike Leach <mike.leach@linaro.org>
Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20210201181351.1475223-8-mathieu.poirier@linaro.org


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 4eb1d85c

drivers/hwtracing/coresight/coresight-catu.c

+3 −2
Original line number Original line Diff line number Diff line
@@ -401,8 +401,9 @@ static const struct attribute_group *catu_groups[] = { 




static inline int catu_wait_for_ready(struct catu_drvdata *drvdata)

static inline int catu_wait_for_ready(struct catu_drvdata *drvdata)

{

{

	return coresight_timeout(drvdata->base,

	struct csdev_access *csa = &drvdata->csdev->access;

				 CATU_STATUS, CATU_STATUS_READY, 1);



	return coresight_timeout(csa, CATU_STATUS, CATU_STATUS_READY, 1);

}

}





static int catu_enable_hw(struct catu_drvdata *drvdata, void *data)

static int catu_enable_hw(struct catu_drvdata *drvdata, void *data)

drivers/hwtracing/coresight/coresight-core.c

+7 −6
Original line number Original line Diff line number Diff line
@@ -1418,23 +1418,24 @@ static void coresight_remove_conns(struct coresight_device *csdev) 
}

}





/**

/**

 * coresight_timeout - loop until a bit has changed to a specific state.

 * coresight_timeout - loop until a bit has changed to a specific register

 * @addr: base address of the area of interest.

 *			state.

 * @offset: address of a register, starting from @addr.

 * @csa: coresight device access for the device

 * @offset: Offset of the register from the base of the device.

 * @position: the position of the bit of interest.

 * @position: the position of the bit of interest.

 * @value: the value the bit should have.

 * @value: the value the bit should have.

 *

 *

 * Return: 0 as soon as the bit has taken the desired state or -EAGAIN if

 * Return: 0 as soon as the bit has taken the desired state or -EAGAIN if

 * TIMEOUT_US has elapsed, which ever happens first.

 * TIMEOUT_US has elapsed, which ever happens first.

 */

 */



int coresight_timeout(struct csdev_access *csa, u32 offset,

int coresight_timeout(void __iomem *addr, u32 offset, int position, int value)

		      int position, int value)

{

{

	int i;

	int i;

	u32 val;

	u32 val;





	for (i = TIMEOUT_US; i > 0; i--) {

	for (i = TIMEOUT_US; i > 0; i--) {

		val = __raw_readl(addr + offset);

		val = csdev_access_read32(csa, offset);

		/* waiting on the bit to go from 0 to 1 */

		/* waiting on the bit to go from 0 to 1 */

		if (value) {

		if (value) {

			if (val & BIT(position))

			if (val & BIT(position))

drivers/hwtracing/coresight/coresight-etb10.c

+3 −2
Original line number Original line Diff line number Diff line
@@ -252,6 +252,7 @@ static void __etb_disable_hw(struct etb_drvdata *drvdata) 
{

{

	u32 ffcr;

	u32 ffcr;

	struct device *dev = &drvdata->csdev->dev;

	struct device *dev = &drvdata->csdev->dev;

	struct csdev_access *csa = &drvdata->csdev->access;





	CS_UNLOCK(drvdata->base);

	CS_UNLOCK(drvdata->base);
@@ -263,7 +264,7 @@ static void __etb_disable_hw(struct etb_drvdata *drvdata) 
	ffcr |= ETB_FFCR_FON_MAN;

	ffcr |= ETB_FFCR_FON_MAN;

	writel_relaxed(ffcr, drvdata->base + ETB_FFCR);

	writel_relaxed(ffcr, drvdata->base + ETB_FFCR);





	if (coresight_timeout(drvdata->base, ETB_FFCR, ETB_FFCR_BIT, 0)) {

	if (coresight_timeout(csa, ETB_FFCR, ETB_FFCR_BIT, 0)) {

		dev_err(dev,

		dev_err(dev,

		"timeout while waiting for completion of Manual Flush\n");

		"timeout while waiting for completion of Manual Flush\n");

	}

	}
@@ -271,7 +272,7 @@ static void __etb_disable_hw(struct etb_drvdata *drvdata) 
	/* disable trace capture */

	/* disable trace capture */

	writel_relaxed(0x0, drvdata->base + ETB_CTL_REG);

	writel_relaxed(0x0, drvdata->base + ETB_CTL_REG);





	if (coresight_timeout(drvdata->base, ETB_FFSR, ETB_FFSR_BIT, 1)) {

	if (coresight_timeout(csa, ETB_FFSR, ETB_FFSR_BIT, 1)) {

		dev_err(dev,

		dev_err(dev,

			"timeout while waiting for Formatter to Stop\n");

			"timeout while waiting for Formatter to Stop\n");

	}

	}

drivers/hwtracing/coresight/coresight-etm4x-core.c

+20 −10
Original line number Original line Diff line number Diff line
@@ -217,7 +217,9 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata) 
{

{

	int i, rc;

	int i, rc;

	struct etmv4_config *config = &drvdata->config;

	struct etmv4_config *config = &drvdata->config;

	struct device *etm_dev = &drvdata->csdev->dev;

	struct coresight_device *csdev = drvdata->csdev;

	struct device *etm_dev = &csdev->dev;

	struct csdev_access *csa = &csdev->access;





	CS_UNLOCK(drvdata->base);

	CS_UNLOCK(drvdata->base);

	etm4_enable_arch_specific(drvdata);

	etm4_enable_arch_specific(drvdata);
@@ -232,7 +234,7 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata) 
	writel_relaxed(0, drvdata->base + TRCPRGCTLR);

	writel_relaxed(0, drvdata->base + TRCPRGCTLR);





	/* wait for TRCSTATR.IDLE to go up */

	/* wait for TRCSTATR.IDLE to go up */

	if (coresight_timeout(drvdata->base, TRCSTATR, TRCSTATR_IDLE_BIT, 1))

	if (coresight_timeout(csa, TRCSTATR, TRCSTATR_IDLE_BIT, 1))

		dev_err(etm_dev,

		dev_err(etm_dev,

			"timeout while waiting for Idle Trace Status\n");

			"timeout while waiting for Idle Trace Status\n");

	if (drvdata->nr_pe)

	if (drvdata->nr_pe)
@@ -323,7 +325,7 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata) 
	writel_relaxed(1, drvdata->base + TRCPRGCTLR);

	writel_relaxed(1, drvdata->base + TRCPRGCTLR);





	/* wait for TRCSTATR.IDLE to go back down to '0' */

	/* wait for TRCSTATR.IDLE to go back down to '0' */

	if (coresight_timeout(drvdata->base, TRCSTATR, TRCSTATR_IDLE_BIT, 0))

	if (coresight_timeout(csa, TRCSTATR, TRCSTATR_IDLE_BIT, 0))

		dev_err(etm_dev,

		dev_err(etm_dev,

			"timeout while waiting for Idle Trace Status\n");

			"timeout while waiting for Idle Trace Status\n");
@@ -587,7 +589,9 @@ static void etm4_disable_hw(void *info) 
	u32 control;

	u32 control;

	struct etmv4_drvdata *drvdata = info;

	struct etmv4_drvdata *drvdata = info;

	struct etmv4_config *config = &drvdata->config;

	struct etmv4_config *config = &drvdata->config;

	struct device *etm_dev = &drvdata->csdev->dev;

	struct coresight_device *csdev = drvdata->csdev;

	struct device *etm_dev = &csdev->dev;

	struct csdev_access *csa = &csdev->access;

	int i;

	int i;





	CS_UNLOCK(drvdata->base);

	CS_UNLOCK(drvdata->base);
@@ -615,8 +619,7 @@ static void etm4_disable_hw(void *info) 
	writel_relaxed(control, drvdata->base + TRCPRGCTLR);

	writel_relaxed(control, drvdata->base + TRCPRGCTLR);





	/* wait for TRCSTATR.PMSTABLE to go to '1' */

	/* wait for TRCSTATR.PMSTABLE to go to '1' */

	if (coresight_timeout(drvdata->base, TRCSTATR,

	if (coresight_timeout(csa, TRCSTATR, TRCSTATR_PMSTABLE_BIT, 1))

			      TRCSTATR_PMSTABLE_BIT, 1))

		dev_err(etm_dev,

		dev_err(etm_dev,

			"timeout while waiting for PM stable Trace Status\n");

			"timeout while waiting for PM stable Trace Status\n");
@@ -1272,7 +1275,15 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) 
{

{

	int i, ret = 0;

	int i, ret = 0;

	struct etmv4_save_state *state;

	struct etmv4_save_state *state;

	struct device *etm_dev = &drvdata->csdev->dev;

	struct coresight_device *csdev = drvdata->csdev;

	struct csdev_access *csa;

	struct device *etm_dev;



	if (WARN_ON(!csdev))

		return -ENODEV;



	etm_dev = &csdev->dev;

	csa = &csdev->access;





	/*

	/*

	 * As recommended by 3.4.1 ("The procedure when powering down the PE")

	 * As recommended by 3.4.1 ("The procedure when powering down the PE")
@@ -1287,8 +1298,7 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) 
	etm4_os_lock(drvdata);

	etm4_os_lock(drvdata);





	/* wait for TRCSTATR.PMSTABLE to go up */

	/* wait for TRCSTATR.PMSTABLE to go up */

	if (coresight_timeout(drvdata->base, TRCSTATR,

	if (coresight_timeout(csa, TRCSTATR, TRCSTATR_PMSTABLE_BIT, 1)) {

			      TRCSTATR_PMSTABLE_BIT, 1)) {

		dev_err(etm_dev,

		dev_err(etm_dev,

			"timeout while waiting for PM Stable Status\n");

			"timeout while waiting for PM Stable Status\n");

		etm4_os_unlock(drvdata);

		etm4_os_unlock(drvdata);
@@ -1377,7 +1387,7 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) 
		state->trcpdcr = readl(drvdata->base + TRCPDCR);

		state->trcpdcr = readl(drvdata->base + TRCPDCR);





	/* wait for TRCSTATR.IDLE to go up */

	/* wait for TRCSTATR.IDLE to go up */

	if (coresight_timeout(drvdata->base, TRCSTATR, TRCSTATR_IDLE_BIT, 1)) {

	if (coresight_timeout(csa, TRCSTATR, TRCSTATR_IDLE_BIT, 1)) {

		dev_err(etm_dev,

		dev_err(etm_dev,

			"timeout while waiting for Idle Trace Status\n");

			"timeout while waiting for Idle Trace Status\n");

		etm4_os_unlock(drvdata);

		etm4_os_unlock(drvdata);

drivers/hwtracing/coresight/coresight-stm.c

+2 −1
Original line number Original line Diff line number Diff line
@@ -258,6 +258,7 @@ static void stm_disable(struct coresight_device *csdev, 
			struct perf_event *event)

			struct perf_event *event)

{

{

	struct stm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);

	struct stm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);

	struct csdev_access *csa = &csdev->access;





	/*

	/*

	 * For as long as the tracer isn't disabled another entity can't

	 * For as long as the tracer isn't disabled another entity can't
@@ -270,7 +271,7 @@ static void stm_disable(struct coresight_device *csdev, 
		spin_unlock(&drvdata->spinlock);

		spin_unlock(&drvdata->spinlock);





		/* Wait until the engine has completely stopped */

		/* Wait until the engine has completely stopped */

		coresight_timeout(drvdata->base, STMTCSR, STMTCSR_BUSY_BIT, 0);

		coresight_timeout(csa, STMTCSR, STMTCSR_BUSY_BIT, 0);





		pm_runtime_put(csdev->dev.parent);

		pm_runtime_put(csdev->dev.parent);