Commit 012c226f authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Bjorn Andersson
Browse files

clk: qcom: rpmh: drop all _ao names 



In preparation for the further cleanup, remove the active only names,
they can be easily generated from the standard ones.

Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: default avatarAlex Elder <elder@linaro.org>
Reviewed-by: default avatarAbel Vesa <abel.vesa@linaro.org>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarBjorn Andersson <andersson@kernel.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221202185843.721673-4-dmitry.baryshkov@linaro.org
parent 65b0c564

drivers/clk/qcom/clk-rpmh.c

+30 −32
Original line number Diff line number Diff line
@@ -70,15 +70,15 @@ struct clk_rpmh_desc { 


static DEFINE_MUTEX(rpmh_clk_lock);



#define __DEFINE_CLK_RPMH(_platform, _name, _name_active, _res_name,	\

#define __DEFINE_CLK_RPMH(_platform, _name, _res_name,			\

			  _res_en_offset, _res_on, _div)		\

	static struct clk_rpmh _platform##_##_name_active;		\

	static struct clk_rpmh _platform##_##_name##_ao;		\

	static struct clk_rpmh _platform##_##_name = {			\

		.res_name = _res_name,					\

		.res_addr = _res_en_offset,				\

		.res_on_val = _res_on,					\

		.div = _div,						\

		.peer = &_platform##_##_name_active,			\

		.peer = &_platform##_##_name##_ao,			\

		.valid_state_mask = (BIT(RPMH_WAKE_ONLY_STATE) |	\

				      BIT(RPMH_ACTIVE_ONLY_STATE) |	\

				      BIT(RPMH_SLEEP_STATE)),		\
@@ -92,7 +92,7 @@ static DEFINE_MUTEX(rpmh_clk_lock); 
			.num_parents = 1,				\

		},							\

	};								\

	static struct clk_rpmh _platform##_##_name_active = {		\

	static struct clk_rpmh _platform##_##_name##_ao= {		\

		.res_name = _res_name,					\

		.res_addr = _res_en_offset,				\

		.res_on_val = _res_on,					\
@@ -102,7 +102,7 @@ static DEFINE_MUTEX(rpmh_clk_lock); 
					BIT(RPMH_ACTIVE_ONLY_STATE)),	\

		.hw.init = &(struct clk_init_data){			\

			.ops = &clk_rpmh_ops,				\

			.name = #_name_active,				\

			.name = #_name "_ao",				\

			.parent_data =  &(const struct clk_parent_data){ \

					.fw_name = "xo",		\

					.name = "xo_board",		\
@@ -111,14 +111,12 @@ static DEFINE_MUTEX(rpmh_clk_lock); 
		},							\

	}



#define DEFINE_CLK_RPMH_ARC(_platform, _name, _name_active, _res_name,	\

			    _res_on, _div)				\

	__DEFINE_CLK_RPMH(_platform, _name, _name_active, _res_name,	\

#define DEFINE_CLK_RPMH_ARC(_platform, _name, _res_name, _res_on, _div)	\

	__DEFINE_CLK_RPMH(_platform, _name, _res_name,			\

			  CLK_RPMH_ARC_EN_OFFSET, _res_on, _div)



#define DEFINE_CLK_RPMH_VRM(_platform, _name, _name_active, _res_name,	\

				_div)					\

	__DEFINE_CLK_RPMH(_platform, _name, _name_active, _res_name,	\

#define DEFINE_CLK_RPMH_VRM(_platform, _name, _res_name, _div)		\

	__DEFINE_CLK_RPMH(_platform, _name, _res_name,			\

			  CLK_RPMH_VRM_EN_OFFSET, 1, _div)



#define DEFINE_CLK_RPMH_BCM(_platform, _name, _res_name)		\
@@ -342,33 +340,33 @@ static const struct clk_ops clk_rpmh_bcm_ops = { 
};



/* Resource name must match resource id present in cmd-db */

DEFINE_CLK_RPMH_ARC(qdu1000, bi_tcxo, bi_tcxo_ao, "xo.lvl", 0x3, 1);

DEFINE_CLK_RPMH_ARC(sdm845, bi_tcxo, bi_tcxo_ao, "xo.lvl", 0x3, 2);

DEFINE_CLK_RPMH_ARC(sc7280, bi_tcxo, bi_tcxo_ao, "xo.lvl", 0x3, 4);

DEFINE_CLK_RPMH_ARC(sm6350, qlink, qlink_ao, "qphy.lvl", 0x1, 4);

DEFINE_CLK_RPMH_ARC(qdu1000, bi_tcxo, "xo.lvl", 0x3, 1);

DEFINE_CLK_RPMH_ARC(sdm845, bi_tcxo, "xo.lvl", 0x3, 2);

DEFINE_CLK_RPMH_ARC(sc7280, bi_tcxo, "xo.lvl", 0x3, 4);

DEFINE_CLK_RPMH_ARC(sm6350, qlink, "qphy.lvl", 0x1, 4);



DEFINE_CLK_RPMH_VRM(sm8250, ln_bb_clk1, ln_bb_clk1_ao, "lnbclka1", 2);

DEFINE_CLK_RPMH_VRM(sdm845, ln_bb_clk2, ln_bb_clk2_ao, "lnbclka2", 2);

DEFINE_CLK_RPMH_VRM(sdm845, ln_bb_clk3, ln_bb_clk3_ao, "lnbclka3", 2);

DEFINE_CLK_RPMH_VRM(sm8250, ln_bb_clk1, "lnbclka1", 2);

DEFINE_CLK_RPMH_VRM(sdm845, ln_bb_clk2, "lnbclka2", 2);

DEFINE_CLK_RPMH_VRM(sdm845, ln_bb_clk3, "lnbclka3", 2);



DEFINE_CLK_RPMH_VRM(sm8450, ln_bb_clk1, ln_bb_clk1_ao, "lnbclka1", 4);

DEFINE_CLK_RPMH_VRM(sm8450, ln_bb_clk2, ln_bb_clk2_ao, "lnbclka2", 4);

DEFINE_CLK_RPMH_VRM(sm8450, ln_bb_clk1, "lnbclka1", 4);

DEFINE_CLK_RPMH_VRM(sm8450, ln_bb_clk2, "lnbclka2", 4);



DEFINE_CLK_RPMH_VRM(sm6350, ln_bb_clk2, ln_bb_clk2_ao, "lnbclkg2", 4);

DEFINE_CLK_RPMH_VRM(sm6350, ln_bb_clk3, ln_bb_clk3_ao, "lnbclkg3", 4);

DEFINE_CLK_RPMH_VRM(sm6350, ln_bb_clk2, "lnbclkg2", 4);

DEFINE_CLK_RPMH_VRM(sm6350, ln_bb_clk3, "lnbclkg3", 4);



DEFINE_CLK_RPMH_VRM(sdm845, rf_clk1, rf_clk1_ao, "rfclka1", 1);

DEFINE_CLK_RPMH_VRM(sdm845, rf_clk2, rf_clk2_ao, "rfclka2", 1);

DEFINE_CLK_RPMH_VRM(sdm845, rf_clk3, rf_clk3_ao, "rfclka3", 1);

DEFINE_CLK_RPMH_VRM(sm8350, rf_clk4, rf_clk4_ao, "rfclka4", 1);

DEFINE_CLK_RPMH_VRM(sm8350, rf_clk5, rf_clk5_ao, "rfclka5", 1);

DEFINE_CLK_RPMH_VRM(sdm845, rf_clk1, "rfclka1", 1);

DEFINE_CLK_RPMH_VRM(sdm845, rf_clk2, "rfclka2", 1);

DEFINE_CLK_RPMH_VRM(sdm845, rf_clk3, "rfclka3", 1);

DEFINE_CLK_RPMH_VRM(sm8350, rf_clk4, "rfclka4", 1);

DEFINE_CLK_RPMH_VRM(sm8350, rf_clk5, "rfclka5", 1);



DEFINE_CLK_RPMH_VRM(sc8180x, rf_clk1, rf_clk1_ao, "rfclkd1", 1);

DEFINE_CLK_RPMH_VRM(sc8180x, rf_clk2, rf_clk2_ao, "rfclkd2", 1);

DEFINE_CLK_RPMH_VRM(sc8180x, rf_clk3, rf_clk3_ao, "rfclkd3", 1);

DEFINE_CLK_RPMH_VRM(sc8180x, rf_clk4, rf_clk4_ao, "rfclkd4", 1);

DEFINE_CLK_RPMH_VRM(sc8180x, rf_clk1, "rfclkd1", 1);

DEFINE_CLK_RPMH_VRM(sc8180x, rf_clk2, "rfclkd2", 1);

DEFINE_CLK_RPMH_VRM(sc8180x, rf_clk3, "rfclkd3", 1);

DEFINE_CLK_RPMH_VRM(sc8180x, rf_clk4, "rfclkd4", 1);



DEFINE_CLK_RPMH_VRM(sm8350, div_clk1, div_clk1_ao, "divclka1", 2);

DEFINE_CLK_RPMH_VRM(sm8350, div_clk1, "divclka1", 2);



DEFINE_CLK_RPMH_BCM(sdm845, ipa, "IP0");

DEFINE_CLK_RPMH_BCM(sdm845, ce, "CE0");