Loading Makefile +1 −1 Original line number Diff line number Diff line VERSION = 4 PATCHLEVEL = 9 SUBLEVEL = 17 SUBLEVEL = 19 EXTRAVERSION = NAME = Roaring Lionus Loading arch/arm/boot/dts/sama5d2.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -266,7 +266,7 @@ }; usb1: ohci@00400000 { compatible = "atmel,sama5d2-ohci", "usb-ohci"; compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00400000 0x100000>; interrupts = <41 IRQ_TYPE_LEVEL_HIGH 2>; clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>; Loading arch/arm/mach-at91/pm.c +17 −1 Original line number Diff line number Diff line Loading @@ -289,6 +289,22 @@ static void at91_ddr_standby(void) at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); } static void sama5d3_ddr_standby(void) { u32 lpr0; u32 saved_lpr0; saved_lpr0 = at91_ramc_read(0, AT91_DDRSDRC_LPR); lpr0 = saved_lpr0 & ~AT91_DDRSDRC_LPCB; lpr0 |= AT91_DDRSDRC_LPCB_POWER_DOWN; at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0); cpu_do_idle(); at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0); } /* We manage both DDRAM/SDRAM controllers, we need more than one value to * remember. */ Loading Loading @@ -323,7 +339,7 @@ static const struct of_device_id const ramc_ids[] __initconst = { { .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby }, { .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby }, { .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby }, { .compatible = "atmel,sama5d3-ddramc", .data = at91_ddr_standby }, { .compatible = "atmel,sama5d3-ddramc", .data = sama5d3_ddr_standby }, { /*sentinel*/ } }; Loading arch/arm64/kernel/kaslr.c +7 −3 Original line number Diff line number Diff line Loading @@ -131,11 +131,15 @@ u64 __init kaslr_early_init(u64 dt_phys, u64 modulo_offset) /* * The kernel Image should not extend across a 1GB/32MB/512MB alignment * boundary (for 4KB/16KB/64KB granule kernels, respectively). If this * happens, increase the KASLR offset by the size of the kernel image. * happens, increase the KASLR offset by the size of the kernel image * rounded up by SWAPPER_BLOCK_SIZE. */ if ((((u64)_text + offset + modulo_offset) >> SWAPPER_TABLE_SHIFT) != (((u64)_end + offset + modulo_offset) >> SWAPPER_TABLE_SHIFT)) offset = (offset + (u64)(_end - _text)) & mask; (((u64)_end + offset + modulo_offset) >> SWAPPER_TABLE_SHIFT)) { u64 kimg_sz = _end - _text; offset = (offset + round_up(kimg_sz, SWAPPER_BLOCK_SIZE)) & mask; } if (IS_ENABLED(CONFIG_KASAN)) /* Loading arch/parisc/include/asm/cacheflush.h +2 −21 Original line number Diff line number Diff line Loading @@ -45,28 +45,9 @@ static inline void flush_kernel_dcache_page(struct page *page) #define flush_kernel_dcache_range(start,size) \ flush_kernel_dcache_range_asm((start), (start)+(size)); /* vmap range flushes and invalidates. Architecturally, we don't need * the invalidate, because the CPU should refuse to speculate once an * area has been flushed, so invalidate is left empty */ static inline void flush_kernel_vmap_range(void *vaddr, int size) { unsigned long start = (unsigned long)vaddr; flush_kernel_dcache_range_asm(start, start + size); } static inline void invalidate_kernel_vmap_range(void *vaddr, int size) { unsigned long start = (unsigned long)vaddr; void *cursor = vaddr; for ( ; cursor < vaddr + size; cursor += PAGE_SIZE) { struct page *page = vmalloc_to_page(cursor); if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) flush_kernel_dcache_page(page); } flush_kernel_dcache_range_asm(start, start + size); } void flush_kernel_vmap_range(void *vaddr, int size); void invalidate_kernel_vmap_range(void *vaddr, int size); #define flush_cache_vmap(start, end) flush_cache_all() #define flush_cache_vunmap(start, end) flush_cache_all() Loading Loading
Makefile +1 −1 Original line number Diff line number Diff line VERSION = 4 PATCHLEVEL = 9 SUBLEVEL = 17 SUBLEVEL = 19 EXTRAVERSION = NAME = Roaring Lionus Loading
arch/arm/boot/dts/sama5d2.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -266,7 +266,7 @@ }; usb1: ohci@00400000 { compatible = "atmel,sama5d2-ohci", "usb-ohci"; compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00400000 0x100000>; interrupts = <41 IRQ_TYPE_LEVEL_HIGH 2>; clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>; Loading
arch/arm/mach-at91/pm.c +17 −1 Original line number Diff line number Diff line Loading @@ -289,6 +289,22 @@ static void at91_ddr_standby(void) at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); } static void sama5d3_ddr_standby(void) { u32 lpr0; u32 saved_lpr0; saved_lpr0 = at91_ramc_read(0, AT91_DDRSDRC_LPR); lpr0 = saved_lpr0 & ~AT91_DDRSDRC_LPCB; lpr0 |= AT91_DDRSDRC_LPCB_POWER_DOWN; at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0); cpu_do_idle(); at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0); } /* We manage both DDRAM/SDRAM controllers, we need more than one value to * remember. */ Loading Loading @@ -323,7 +339,7 @@ static const struct of_device_id const ramc_ids[] __initconst = { { .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby }, { .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby }, { .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby }, { .compatible = "atmel,sama5d3-ddramc", .data = at91_ddr_standby }, { .compatible = "atmel,sama5d3-ddramc", .data = sama5d3_ddr_standby }, { /*sentinel*/ } }; Loading
arch/arm64/kernel/kaslr.c +7 −3 Original line number Diff line number Diff line Loading @@ -131,11 +131,15 @@ u64 __init kaslr_early_init(u64 dt_phys, u64 modulo_offset) /* * The kernel Image should not extend across a 1GB/32MB/512MB alignment * boundary (for 4KB/16KB/64KB granule kernels, respectively). If this * happens, increase the KASLR offset by the size of the kernel image. * happens, increase the KASLR offset by the size of the kernel image * rounded up by SWAPPER_BLOCK_SIZE. */ if ((((u64)_text + offset + modulo_offset) >> SWAPPER_TABLE_SHIFT) != (((u64)_end + offset + modulo_offset) >> SWAPPER_TABLE_SHIFT)) offset = (offset + (u64)(_end - _text)) & mask; (((u64)_end + offset + modulo_offset) >> SWAPPER_TABLE_SHIFT)) { u64 kimg_sz = _end - _text; offset = (offset + round_up(kimg_sz, SWAPPER_BLOCK_SIZE)) & mask; } if (IS_ENABLED(CONFIG_KASAN)) /* Loading
arch/parisc/include/asm/cacheflush.h +2 −21 Original line number Diff line number Diff line Loading @@ -45,28 +45,9 @@ static inline void flush_kernel_dcache_page(struct page *page) #define flush_kernel_dcache_range(start,size) \ flush_kernel_dcache_range_asm((start), (start)+(size)); /* vmap range flushes and invalidates. Architecturally, we don't need * the invalidate, because the CPU should refuse to speculate once an * area has been flushed, so invalidate is left empty */ static inline void flush_kernel_vmap_range(void *vaddr, int size) { unsigned long start = (unsigned long)vaddr; flush_kernel_dcache_range_asm(start, start + size); } static inline void invalidate_kernel_vmap_range(void *vaddr, int size) { unsigned long start = (unsigned long)vaddr; void *cursor = vaddr; for ( ; cursor < vaddr + size; cursor += PAGE_SIZE) { struct page *page = vmalloc_to_page(cursor); if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) flush_kernel_dcache_page(page); } flush_kernel_dcache_range_asm(start, start + size); } void flush_kernel_vmap_range(void *vaddr, int size); void invalidate_kernel_vmap_range(void *vaddr, int size); #define flush_cache_vmap(start, end) flush_cache_all() #define flush_cache_vunmap(start, end) flush_cache_all() Loading