Commit ee3eaee6 authored Oct 06, 2017 by Nicolas Pitre Committed by Russell King Oct 12, 2017

ARM: 8704/1: semihosting: use proper instruction on v7m processors



The svc instruction doesn't exist on v7m processors. Semihosting ops are
invoked with the bkpt instruction instead.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>

parent 6042b8c7

arch/arm/boot/compressed/debug.S

+4 −0

Original line number	Diff line number	Diff line
		@@ -23,7 +23,11 @@ ENTRY(putc)
		strb r0, [r1]
		mov r0, #0x03 @ SYS_WRITEC
		ARM( svc #0x123456 )
		#ifdef CONFIG_CPU_V7M
		THUMB( bkpt #0xab )
		#else
		THUMB( svc #0xab )
		#endif
		mov pc, lr
		.align 2
		1: .word _GLOBAL_OFFSET_TABLE_ - .

arch/arm/kernel/debug.S

+8 −0

Original line number	Diff line number	Diff line
		@@ -115,7 +115,11 @@ ENTRY(printascii)
		mov r1, r0
		mov r0, #0x04 @ SYS_WRITE0
		ARM( svc #0x123456 )
		#ifdef CONFIG_CPU_V7M
		THUMB( bkpt #0xab )
		#else
		THUMB( svc #0xab )
		#endif
		ret lr
		ENDPROC(printascii)

		@@ -124,7 +128,11 @@ ENTRY(printch)
		strb r0, [r1]
		mov r0, #0x03 @ SYS_WRITEC
		ARM( svc #0x123456 )
		#ifdef CONFIG_CPU_V7M
		THUMB( bkpt #0xab )
		#else
		THUMB( svc #0xab )
		#endif
		ret lr
		ENDPROC(printch)