Commit eaaeb1cb authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branch 'pci/misc' into next 

* pci/misc:
  PCI: Enable upstream bridges even for VFs on virtual buses
  PCI: Add pci_upstream_bridge()
  PCI: Add x86_msi.msi_mask_irq() and msix_mask_irq()
parents c245f242 79272138

arch/x86/include/asm/x86_init.h

+3 −0
Original line number Diff line number Diff line
@@ -172,6 +172,7 @@ struct x86_platform_ops { 


struct pci_dev;

struct msi_msg;

struct msi_desc;



struct x86_msi_ops {

	int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
@@ -182,6 +183,8 @@ struct x86_msi_ops { 
	void (*teardown_msi_irqs)(struct pci_dev *dev);

	void (*restore_msi_irqs)(struct pci_dev *dev, int irq);

	int  (*setup_hpet_msi)(unsigned int irq, unsigned int id);

	u32 (*msi_mask_irq)(struct msi_desc *desc, u32 mask, u32 flag);

	u32 (*msix_mask_irq)(struct msi_desc *desc, u32 flag);

};



struct IO_APIC_route_entry;

arch/x86/kernel/x86_init.c

+10 −0
Original line number Diff line number Diff line
@@ -116,6 +116,8 @@ struct x86_msi_ops x86_msi = { 
	.teardown_msi_irqs	= default_teardown_msi_irqs,

	.restore_msi_irqs	= default_restore_msi_irqs,

	.setup_hpet_msi		= default_setup_hpet_msi,

	.msi_mask_irq		= default_msi_mask_irq,

	.msix_mask_irq		= default_msix_mask_irq,

};



/* MSI arch specific hooks */
@@ -138,6 +140,14 @@ void arch_restore_msi_irqs(struct pci_dev *dev, int irq) 
{

	x86_msi.restore_msi_irqs(dev, irq);

}

u32 arch_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)

{

	return x86_msi.msi_mask_irq(desc, mask, flag);

}

u32 arch_msix_mask_irq(struct msi_desc *desc, u32 flag)

{

	return x86_msi.msix_mask_irq(desc, flag);

}

#endif



struct x86_io_apic_ops x86_io_apic_ops = {

arch/x86/pci/xen.c

+12 −1
Original line number Diff line number Diff line
@@ -382,7 +382,14 @@ static void xen_teardown_msi_irq(unsigned int irq) 
{

	xen_destroy_irq(irq);

}



static u32 xen_nop_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)

{

	return 0;

}

static u32 xen_nop_msix_mask_irq(struct msi_desc *desc, u32 flag)

{

	return 0;

}

#endif



int __init pci_xen_init(void)
@@ -406,6 +413,8 @@ int __init pci_xen_init(void) 
	x86_msi.setup_msi_irqs = xen_setup_msi_irqs;

	x86_msi.teardown_msi_irq = xen_teardown_msi_irq;

	x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;

	x86_msi.msi_mask_irq = xen_nop_msi_mask_irq;

	x86_msi.msix_mask_irq = xen_nop_msix_mask_irq;

#endif

	return 0;

}
@@ -485,6 +494,8 @@ int __init pci_xen_initial_domain(void) 
	x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs;

	x86_msi.teardown_msi_irq = xen_teardown_msi_irq;

	x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs;

	x86_msi.msi_mask_irq = xen_nop_msi_mask_irq;

	x86_msi.msix_mask_irq = xen_nop_msix_mask_irq;

#endif

	xen_setup_acpi_sci();

	__acpi_register_gsi = acpi_register_gsi_xen;

drivers/pci/msi.c

+16 −6
Original line number Diff line number Diff line
@@ -185,7 +185,7 @@ static inline __attribute_const__ u32 msi_enabled_mask(u16 control) 
 * reliably as devices without an INTx disable bit will then generate a

 * level IRQ which will never be cleared.

 */

static u32 __msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)

u32 default_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)

{

	u32 mask_bits = desc->masked;
@@ -199,9 +199,14 @@ static u32 __msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) 
	return mask_bits;

}



__weak u32 arch_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)

{

	return default_msi_mask_irq(desc, mask, flag);

}



static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)

{

	desc->masked = __msi_mask_irq(desc, mask, flag);

	desc->masked = arch_msi_mask_irq(desc, mask, flag);

}



/*
@@ -211,7 +216,7 @@ static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) 
 * file.  This saves a few milliseconds when initialising devices with lots

 * of MSI-X interrupts.

 */

static u32 __msix_mask_irq(struct msi_desc *desc, u32 flag)

u32 default_msix_mask_irq(struct msi_desc *desc, u32 flag)

{

	u32 mask_bits = desc->masked;

	unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
@@ -224,9 +229,14 @@ static u32 __msix_mask_irq(struct msi_desc *desc, u32 flag) 
	return mask_bits;

}



__weak u32 arch_msix_mask_irq(struct msi_desc *desc, u32 flag)

{

	return default_msix_mask_irq(desc, flag);

}



static void msix_mask_irq(struct msi_desc *desc, u32 flag)

{

	desc->masked = __msix_mask_irq(desc, flag);

	desc->masked = arch_msix_mask_irq(desc, flag);

}



static void msi_set_mask_bit(struct irq_data *data, u32 flag)
@@ -902,7 +912,7 @@ void pci_msi_shutdown(struct pci_dev *dev) 
	pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &ctrl);

	mask = msi_capable_mask(ctrl);

	/* Keep cached state to be restored */

	__msi_mask_irq(desc, mask, ~mask);

	arch_msi_mask_irq(desc, mask, ~mask);



	/* Restore dev->irq to its default pin-assertion irq */

	dev->irq = desc->msi_attrib.default_irq;
@@ -998,7 +1008,7 @@ void pci_msix_shutdown(struct pci_dev *dev) 
	/* Return the device with MSI-X masked as initial states */

	list_for_each_entry(entry, &dev->msi_list, list) {

		/* Keep cached states to be restored */

		__msix_mask_irq(entry, 1);

		arch_msix_mask_irq(entry, 1);

	}



	msix_set_enable(dev, 0);

drivers/pci/pci.c

+8 −5
Original line number Diff line number Diff line
@@ -1148,12 +1148,12 @@ int pci_reenable_device(struct pci_dev *dev) 


static void pci_enable_bridge(struct pci_dev *dev)

{

	struct pci_dev *bridge;

	int retval;



	if (!dev)

		return;



	pci_enable_bridge(dev->bus->self);

	bridge = pci_upstream_bridge(dev);

	if (bridge)

		pci_enable_bridge(bridge);



	if (pci_is_enabled(dev)) {

		if (!dev->is_busmaster)
@@ -1170,6 +1170,7 @@ static void pci_enable_bridge(struct pci_dev *dev) 


static int pci_enable_device_flags(struct pci_dev *dev, unsigned long flags)

{

	struct pci_dev *bridge;

	int err;

	int i, bars = 0;
@@ -1188,7 +1189,9 @@ static int pci_enable_device_flags(struct pci_dev *dev, unsigned long flags) 
	if (atomic_inc_return(&dev->enable_cnt) > 1)

		return 0;		/* already enabled */



	pci_enable_bridge(dev->bus->self);

	bridge = pci_upstream_bridge(dev);

	if (bridge)

		pci_enable_bridge(bridge);



	/* only skip sriov related */

	for (i = 0; i <= PCI_ROM_RESOURCE; i++)