Loading Makefile +1 −1 Original line number Diff line number Diff line VERSION = 4 PATCHLEVEL = 9 SUBLEVEL = 25 SUBLEVEL = 26 EXTRAVERSION = NAME = Roaring Lionus Loading arch/arc/include/asm/atomic.h +2 −1 Original line number Diff line number Diff line Loading @@ -17,10 +17,11 @@ #include <asm/barrier.h> #include <asm/smp.h> #define ATOMIC_INIT(i) { (i) } #ifndef CONFIG_ARC_PLAT_EZNPS #define atomic_read(v) READ_ONCE((v)->counter) #define ATOMIC_INIT(i) { (i) } #ifdef CONFIG_ARC_HAS_LLSC Loading arch/arc/include/asm/entry-arcv2.h +2 −0 Original line number Diff line number Diff line Loading @@ -16,6 +16,7 @@ ; ; Now manually save: r12, sp, fp, gp, r25 PUSH r30 PUSH r12 ; Saving pt_regs->sp correctly requires some extra work due to the way Loading Loading @@ -72,6 +73,7 @@ POPAX AUX_USER_SP 1: POP r12 POP r30 .endm Loading arch/arc/include/asm/ptrace.h +1 −1 Original line number Diff line number Diff line Loading @@ -84,7 +84,7 @@ struct pt_regs { unsigned long fp; unsigned long sp; /* user/kernel sp depending on where we came from */ unsigned long r12; unsigned long r12, r30; /*------- Below list auto saved by h/w -----------*/ unsigned long r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11; Loading arch/mips/kernel/cevt-r4k.c +1 −1 Original line number Diff line number Diff line Loading @@ -80,7 +80,7 @@ static unsigned int calculate_min_delta(void) } /* Sorted insert of 75th percentile into buf2 */ for (k = 0; k < i; ++k) { for (k = 0; k < i && k < ARRAY_SIZE(buf2); ++k) { if (buf1[ARRAY_SIZE(buf1) - 1] < buf2[k]) { l = min_t(unsigned int, i, ARRAY_SIZE(buf2) - 1); Loading Loading
Makefile +1 −1 Original line number Diff line number Diff line VERSION = 4 PATCHLEVEL = 9 SUBLEVEL = 25 SUBLEVEL = 26 EXTRAVERSION = NAME = Roaring Lionus Loading
arch/arc/include/asm/atomic.h +2 −1 Original line number Diff line number Diff line Loading @@ -17,10 +17,11 @@ #include <asm/barrier.h> #include <asm/smp.h> #define ATOMIC_INIT(i) { (i) } #ifndef CONFIG_ARC_PLAT_EZNPS #define atomic_read(v) READ_ONCE((v)->counter) #define ATOMIC_INIT(i) { (i) } #ifdef CONFIG_ARC_HAS_LLSC Loading
arch/arc/include/asm/entry-arcv2.h +2 −0 Original line number Diff line number Diff line Loading @@ -16,6 +16,7 @@ ; ; Now manually save: r12, sp, fp, gp, r25 PUSH r30 PUSH r12 ; Saving pt_regs->sp correctly requires some extra work due to the way Loading Loading @@ -72,6 +73,7 @@ POPAX AUX_USER_SP 1: POP r12 POP r30 .endm Loading
arch/arc/include/asm/ptrace.h +1 −1 Original line number Diff line number Diff line Loading @@ -84,7 +84,7 @@ struct pt_regs { unsigned long fp; unsigned long sp; /* user/kernel sp depending on where we came from */ unsigned long r12; unsigned long r12, r30; /*------- Below list auto saved by h/w -----------*/ unsigned long r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11; Loading
arch/mips/kernel/cevt-r4k.c +1 −1 Original line number Diff line number Diff line Loading @@ -80,7 +80,7 @@ static unsigned int calculate_min_delta(void) } /* Sorted insert of 75th percentile into buf2 */ for (k = 0; k < i; ++k) { for (k = 0; k < i && k < ARRAY_SIZE(buf2); ++k) { if (buf1[ARRAY_SIZE(buf1) - 1] < buf2[k]) { l = min_t(unsigned int, i, ARRAY_SIZE(buf2) - 1); Loading