Loading arch/sparc64/kernel/dtlb_backend.S +1 −1 Original line number Diff line number Diff line Loading @@ -16,7 +16,7 @@ #elif PAGE_SHIFT == 19 #define SZ_BITS _PAGE_SZ512K #elif PAGE_SHIFT == 22 #define SZ_BITS _PAGE_SZ4M #define SZ_BITS _PAGE_SZ4MB #endif #define VALID_SZ_BITS (_PAGE_VALID | SZ_BITS) Loading Loading
arch/sparc64/kernel/dtlb_backend.S +1 −1 Original line number Diff line number Diff line Loading @@ -16,7 +16,7 @@ #elif PAGE_SHIFT == 19 #define SZ_BITS _PAGE_SZ512K #elif PAGE_SHIFT == 22 #define SZ_BITS _PAGE_SZ4M #define SZ_BITS _PAGE_SZ4MB #endif #define VALID_SZ_BITS (_PAGE_VALID | SZ_BITS) Loading