Loading drivers/clk/meson/gxbb.h +2 −2 Original line number Diff line number Diff line Loading @@ -209,7 +209,7 @@ /* CLKID_ETH */ #define CLKID_DEMUX 37 /* CLKID_AIU_GLUE */ #define CLKID_IEC958 39 /* CLKID_IEC958 */ /* CLKID_I2S_OUT */ #define CLKID_AMCLK 41 #define CLKID_AIFIFO2 42 Loading Loading @@ -251,7 +251,7 @@ #define CLKID_GCLK_VENCI_INT 78 #define CLKID_DAC_CLK 79 /* CLKID_AOCLK_GATE */ #define CLKID_IEC958_GATE 81 /* CLKID_IEC958_GATE */ #define CLKID_ENC480P 82 #define CLKID_RNG1 83 #define CLKID_GCLK_VENCI_INT1 84 Loading include/dt-bindings/clock/gxbb-clkc.h +2 −0 Original line number Diff line number Diff line Loading @@ -19,6 +19,7 @@ #define CLKID_SPI 34 #define CLKID_ETH 36 #define CLKID_AIU_GLUE 38 #define CLKID_IEC958 39 #define CLKID_I2S_OUT 40 #define CLKID_MIXER_IFACE 44 #define CLKID_AIU 47 Loading @@ -31,6 +32,7 @@ #define CLKID_SANA 69 #define CLKID_GCLK_VENCI_INT0 77 #define CLKID_AOCLK_GATE 80 #define CLKID_IEC958_GATE 81 #define CLKID_AO_I2C 93 #define CLKID_SD_EMMC_A 94 #define CLKID_SD_EMMC_B 95 Loading Loading
drivers/clk/meson/gxbb.h +2 −2 Original line number Diff line number Diff line Loading @@ -209,7 +209,7 @@ /* CLKID_ETH */ #define CLKID_DEMUX 37 /* CLKID_AIU_GLUE */ #define CLKID_IEC958 39 /* CLKID_IEC958 */ /* CLKID_I2S_OUT */ #define CLKID_AMCLK 41 #define CLKID_AIFIFO2 42 Loading Loading @@ -251,7 +251,7 @@ #define CLKID_GCLK_VENCI_INT 78 #define CLKID_DAC_CLK 79 /* CLKID_AOCLK_GATE */ #define CLKID_IEC958_GATE 81 /* CLKID_IEC958_GATE */ #define CLKID_ENC480P 82 #define CLKID_RNG1 83 #define CLKID_GCLK_VENCI_INT1 84 Loading
include/dt-bindings/clock/gxbb-clkc.h +2 −0 Original line number Diff line number Diff line Loading @@ -19,6 +19,7 @@ #define CLKID_SPI 34 #define CLKID_ETH 36 #define CLKID_AIU_GLUE 38 #define CLKID_IEC958 39 #define CLKID_I2S_OUT 40 #define CLKID_MIXER_IFACE 44 #define CLKID_AIU 47 Loading @@ -31,6 +32,7 @@ #define CLKID_SANA 69 #define CLKID_GCLK_VENCI_INT0 77 #define CLKID_AOCLK_GATE 80 #define CLKID_IEC958_GATE 81 #define CLKID_AO_I2C 93 #define CLKID_SD_EMMC_A 94 #define CLKID_SD_EMMC_B 95 Loading