Commit c43da2f5 authored by Cyrill Gorcunov's avatar Cyrill Gorcunov Committed by Ingo Molnar
Browse files

x86: apic - unify lapic_setup_esr 



We use 32bit code former for 64bit
mode since it's much better implementation
and easier to merge.

Signed-off-by: default avatarCyrill Gorcunov <gorcunov@gmail.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 36c9d674

arch/x86/kernel/apic_32.c

+11 −10
Original line number Diff line number Diff line
@@ -983,6 +983,16 @@ static void __cpuinit lapic_setup_esr(void) 
{

	unsigned long oldvalue, value, maxlvt;

	if (lapic_is_integrated() && !esr_disable) {

		if (esr_disable) {

			/*

			 * Something untraceable is creating bad interrupts on

			 * secondary quads ... for the moment, just leave the

			 * ESR disabled - we can't do anything useful with the

			 * errors anyway - mbligh

			 */

			printk(KERN_INFO "Leaving ESR disabled.\n");

			return;

		}

		/* !82489DX */

		maxlvt = lapic_get_maxlvt();

		if (maxlvt > 3)		/* Due to the Pentium erratum 3AP. */
@@ -1003,15 +1013,6 @@ static void __cpuinit lapic_setup_esr(void) 
				"vector: 0x%08lx  after: 0x%08lx\n",

				oldvalue, value);

	} else {

		if (esr_disable)

			/*

			 * Something untraceable is creating bad interrupts on

			 * secondary quads ... for the moment, just leave the

			 * ESR disabled - we can't do anything useful with the

			 * errors anyway - mbligh

			 */

			printk(KERN_INFO "Leaving ESR disabled.\n");

		else

		printk(KERN_INFO "No ESR for 82489DX.\n");

	}

}

arch/x86/kernel/apic_64.c

+39 −12
Original line number Diff line number Diff line
@@ -863,6 +863,45 @@ void __init init_bsp_APIC(void) 
	apic_write(APIC_LVT1, value);

}



static void __cpuinit lapic_setup_esr(void)

{

	unsigned long oldvalue, value, maxlvt;

	if (lapic_is_integrated() && !esr_disable) {

		if (esr_disable) {

			/*

			 * Something untraceable is creating bad interrupts on

			 * secondary quads ... for the moment, just leave the

			 * ESR disabled - we can't do anything useful with the

			 * errors anyway - mbligh

			 */

			printk(KERN_INFO "Leaving ESR disabled.\n");

			return;

		}

		/* !82489DX */

		maxlvt = lapic_get_maxlvt();

		if (maxlvt > 3)		/* Due to the Pentium erratum 3AP. */

			apic_write(APIC_ESR, 0);

		oldvalue = apic_read(APIC_ESR);



		/* enables sending errors */

		value = ERROR_APIC_VECTOR;

		apic_write(APIC_LVTERR, value);

		/*

		 * spec says clear errors after enabling vector.

		 */

		if (maxlvt > 3)

			apic_write(APIC_ESR, 0);

		value = apic_read(APIC_ESR);

		if (value != oldvalue)

			apic_printk(APIC_VERBOSE, "ESR value before enabling "

				"vector: 0x%08lx  after: 0x%08lx\n",

				oldvalue, value);

	} else {

		printk(KERN_INFO "No ESR for 82489DX.\n");

	}

}





/**

 * setup_local_APIC - setup the local APIC

 */
@@ -968,18 +1007,6 @@ void __cpuinit setup_local_APIC(void) 
	preempt_enable();

}



static void __cpuinit lapic_setup_esr(void)

{

	unsigned maxlvt = lapic_get_maxlvt();



	apic_write(APIC_LVTERR, ERROR_APIC_VECTOR);

	/*

	 * spec says clear errors after enabling vector.

	 */

	if (maxlvt > 3)

		apic_write(APIC_ESR, 0);

}



void __cpuinit end_local_APIC_setup(void)

{

	lapic_setup_esr();